Senior Design Engineer, NVLINK-C2C Coherent Interconnect
NVIDIA Gruppe
NVIDIA Gruppe is seeking a Senior Design Engineer for the Coherent High Speed Interconnect team in Santa Clara, California. The candidate will work on cutting-edge interconnect technology for mobile SoCs and GPUs, collaborating with various engineering teams to deliver high-performance solutions.
The role requires extensive experience in design and knowledge of interconnect protocols. It includes a competitive salary range along with equity and comprehensive benefits.
#J-18808-Ljbffr$168k - $264.5k
NVIDIA is looking for a Senior Design Engineer for our Coherent High Speed Interconnect team!For two decades, NVIDIA has pioneered visual computing, the art and... ...state-of-the-art high speed coherent interconnects (NVLINK-C2C) for our mobile SoCs and GPUs.Collaborate with...SeniorFull time- ...NVIDIA in California seeks a Senior Design Engineer to drive the architecture and implementation of NVLINK-C2C high-speed interconnects for mobile SoCs and GPUs. You will collaborate with architects, external partners, software teams, and circuit designers to deliver...Senior
$136k - $218.5k
As a member of our CPU Cache Coherent Interconnects Design Team, you will be responsible for the physical design of CPU on-chip interconnect network... ...caches.What we need to see:Master’s Degree in Electrical Engineering, Computer Engineering or Computer Science or equivalent...SeniorFull time$136k - $218.5k
We are now looking for a Senior Logic Design Engineer!As a member of our CPU Logic Design Team, you will be responsible for the design of CPU on-chip and off-chip interconnect network, MP coherency and last-level and system caches, focusing on such tasks as micro-architectural...SeniorFull time$151k - $251.8k
...of people around the world. Come build with us!Role and ResponsibilitiesAs a Design Verification Engineer, you will contribute to the verification of System IP, including coherent interconnects and caches. The ideal candidate will have a background in design...SuggestedHourly payFull timeRelocation$231.44k - $282.88k
...tomorrow across every market segment of chip design, including artificial intelligence,... ...looking for a Principal Design Verification Engineer to lead verification strategy and execution for a scalable cache-coherent interconnect subsystem used in high-performance CPU...Work experience placement$136k - $218.5k
...NVIDIA is seeking a motivated and creative Senior Verification Engineer to join our Tegra SoC IP Verification team.... ...you will work closely with architecture and design teams to verify complex High Speed Coherent Interconnect Hub IP. You will help define verification strategies...Senior- NVIDIA in Santa Clara, CA, seeks a Senior Digital Design Engineer for its NVLink Fusion AI infrastructure SoC team. You will analyze architectural requirements, implement RTL blocks, and collaborate with architects, verification, and SoC integration engineers to deliver...Senior
- ...NVIDIA Corporation in Santa Clara, CA seeks a CPU Cache Coherent Interconnects Design Engineer to own the physical design of the on-chip interconnect network and last-level caches. You will perform synthesis, timing closure, and power optimization while collaborating...Senior
$136k - $218.5k
...the world. NVIDIA is looking for an Senior ASIC Design Engineer to join our Memory Subsystem Team!Whatyou... ...a world-class solution. NVIDIA SOC Interconnects, ordering controllers and memory... ...experienceExperience with high-speed coherent interconnects, protocol bridges,...SeniorFull time- ...Senior Design Engineer IILocation: Santa Clara, CAJob type: FulltimeResponsibility:Working on Cache Directory blockSkills... ...symmetric multi-processing and cache coherency protocolsExperience with coherent interconnect designLogic design experience with state of the...Senior
$231.44k - $282.88k
...every market segment of chip design, including artificial... ...a principal‑level hardware engineer who is passionate about designing... ...designing industry‑leading CPU and interconnect IP to help drive the tidal... ...multi‑core and multi‑system coherence. Design extensive...Work experience placementNight shift$168k - $264.5k
We are now looking for a motivated Senior Circuit Design Engineer to join our dynamic and growing Power... ...and further translate these into a coherent set of voltage regulator features and... ...innovative solutions addressing packaging, interconnect, physical design, electrical and...SeniorFull time$136k - $218.5k
...speed I/O group delivers innovative PHY designs that power the most powerful AI... ...supporting NVIDIA's high-performance interconnect protocols: NVLINK, Ethernet, and InfiniBand. We recently... ...:B.S. or M.S. degree in Electrical Engineering or equivalent experience.5+ years of...SeniorFull time- ...assertions (SVA), and functional coverage. Verify CPU subsystem functionality, interconnects, interrupts, coherency, power management, and exception handling. Execute regressions, debug RTL/design issues, and drive functional and code coverage closure. Collaborate with...Senior
$164.47k - $311.89k
...: About the RoleIntel is seeking a Senior Design Verification Engineer for the Silicon Chassis team. In this... ...of critical chassis and interconnect IP blocks from planning through signoff... ..., AXI), PCIe, UCIe, and CXL; cache coherency and memory consistency modelsExperience...SeniorFull timeInternshipLocal areaImmediate startShift work$150k - $250k
Job Title: Senior ASIC Design EngineerJob Location: Santa Clara, CA or Boston, MACompensation:... ...seeking a highly skilled Senior ASIC Design Engineer to lead the design and development of... ...design of memory subsystems and cache coherence mechanisms.Mentor junior engineers and...Senior$168k - $264.5k
We are now looking for a Senior Mixed Signal Design Engineer to be part of the Mixed Signal design team building next generation NVLINK. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from...SeniorFull time- ...is seeking an HSIO Functional and Power Management Engineer for their Silicon Co-Design Group in Santa Clara, California. The successful candidate... ...the design of next-generation high-speed IOs like NVLink and NVLink-C2C and lead efforts in optimizing power management....Senior
$168k - $264.5k
...a challenge, come join this diverse team and help move the needle! We are looking for a senior engineer to be part of the mixed-signal design team building next generation NVLINK. This position offers the opportunity to have real impact in a dynamic, technology-focused...SeniorFull time$133k - $180k
...competitive edge in an increasingly interconnected world. Our solutions are designed to not only meet the current... ...prestigious awards, such as Best Engineering Team, Best Company for Diversity,... ...EngineeringExperience level: Mid-Senior LevelIndustry: Computer NetworkingSeniorFlexible hours$196k - $310.5k
We are now looking for a Senior ASIC Floorplan Design Engineer!NVIDIA is seeking a talented ASIC Floorplan Engineer to design and implement the world... ...with the ASIC design team to identify area, interconnect and floorplan improvement opportunitiesSolve timing and...SeniorFull time$168k - $264.5k
We are now looking for a Senior ASIC Design Engineer.NVIDIA is seeking ASIC Design Engineers to implement the world’s leading SoC's and GPU's.... ...on arbiters, scheduling, synchronization & bus protocols, interconnect networks and/or caches.Great understanding of ASIC design...SeniorFull timeWork experience placement$141.91k - $269.1k
...a rich IP portfolio, a world-class design ecosystem, and an operationally resilient... ..., graphics, media, display, AI, interconnect, fabric and other critical foundational... ..., Defense, Government (ADG) - The Senior DFT Logic Design Engineer provides technical support to Intel...SeniorFull timeInternshipLocal areaImmediate startShift work$138k - $206k
...part of a global leader whose innovative designs are pushing the boundaries of what’s... ...closely with both hardware and software engineers to identify and address the unique challenges... ...and trends across memory, computing, interconnect, and AI/ML, ensuring that our platforms...SeniorWork at officeFlexible hoursNight shift$150k - $250k
...modems. Celero is seeking a highly skilled and motivated ASIC Design Engineer to join our team and contribute to the development of... ...designing ASICs for optical communications, optical transceivers, coherent communications, or high-speed networking. Experience with...SeniorFor contractors- ...Celero Communications is seeking a High-Speed CMOS PLL Analog Design Engineer to deliver transformative High-Speed Interconnect Technology. You will play a key role in designing PLLs for next generation optical transceivers and ADC/DAC systems. The ideal candidate has...Senior
$207k - $230k
...Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with... ...requirements. Discover more at As an Astera Labs STA Physical Design Engineer, Senior Principa l you will play a crucial role in driving the...SeniorFlexible hours$221.7k - $364.8k
...the microarchitecture development of custom coherent interconnect IP and/or last-level cache (LLC) blocks for next-generation designs. In this role, you will drive key aspects... ...leadership and mentorship to junior engineers across the team.Skills and Qualifications1...Hourly payFull timeRelocation- ...: You will contribute to the ASIC (chip) design for high-performance network chips: AINIC... ...design, Physical Design teams, and product engineers to achieve first pass silicon success.THE... ...:A successful candidate will work with senior silicon design engineers. The candidate will...SeniorNight shift
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