Sign up to access all features of our service.
  • Job search
  • Favorites
  • Create a CV
    New
  • Salaries
  • Subscriptions

Sr. Staff ASIC Design Engineer

Jobleads-US

ADVANCE YOUR CAREER. ADVANCE THE WORLD.

At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future.

Whether you’re redesigning next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger— technology that moves the world forward. Join us and, together, we’ll advance your career.

THE ROLE:

As a key member of AMD’s FPGA Product and Platform development team, you will have various responsibilities in the technical execution of Adaptive & Embedded Computing Group (AECG) device programs from definition to productization. You will leverage modern RTL design methodologies, advanced EDA tools, and AI-driven automation in supporting IP development for Silicon implementation and first-time-right SW solution.

THE PERSON

You are passionate about HW architecture, Digital design, and building cutting-edge silicon. As a strong problem solver and analytical thinker, you bring collaboration, communication, and adaptability to cross-functional teams spanning multiple time zones.

KEY RESPONSIBILITIES:

  • Participate in all stages of the design flow, from RTL development through GDS implementation.
  • Design and implement RTL for complex digital and mixed-signal blocks using Verilog and System Verilog.
  • Support physical design activities, including synthesis, DFT implementation, place-and-route, and Static Timing Analysis (STA).
  • Collaborate closely with Functional Verification teams to support block-level verification using constrained-random and directed test environments based on System Verilog and UVM.
  • Utilize scripting languages such as Perl, Tcl, Shell, and Python to maintain existing design automation flows and develop new tools supporting various aspects of design implementation.
  • Partner with cross-functional teams across multiple engineering disciplines and geographic locations.
  • Communicate regularly with global project teams to resolve technical issues and ensure project milestones and objectives are achieved.

PREFERRED EXPERIENCE:

  • Strong understanding of different design stages from RTL to GDS implementation
  • Proficient in RTL design implementation of Digital/Analog blocks using Verilog/System Verilog. Experience with HBM, D2D, Serdes, PCIe like protocols.
  • Knowledge in VLSI design, Design Automation, and IC design.
  • Knowledge of Physical Design (floor planning, synthesis, place & route) and Static Timing Analysis.
  • Basic knowledge of EDA Tools (like Synopsys DC Compiler, Primetime, VCS, Cadence Virtuoso).
  • Experience with UVM/OVM and/or Verilog, System Verilog test benches, BFMs and usage of simulation tools/debug environments is preferred.
  • Basic understanding of FPGA architecture and customer usage model is a plus.
  • Proficiency in Perl, Tcl, Shell, Python and/or other scripting language.
  • Excellent written and verbal communication skills in English.
  • Self-motivated team worker with ability to work in a fast-paced work environment.

ACADEMIC CREDENTIALS:

  • Bachelor's or master's degree in computer engineering, electrical engineering, or a related field.

LOCATION:

San Jose, CA (Hybrid)

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here.

This posting is for an existing vacancy.

#J-18808-Ljbffr Jobleads-US
Vacancy posted 2 days ago
Similar jobs that could be interesting for youBased on the Sr. Staff ASIC Design Engineer in San Jose, CA vacancy
  • $249.24k - $348.93k

     ...revolutionary satellite communications network designed to deliver symmetrical data speeds of up...  ...: Design and develop FPGAs, digital ASICs, and/or mixed-signal ASICs Implement...  ..., firmware, architecture, and product engineering Support lab integration and... 
    Senior
    Permanent employment
    Full time
    Temporary work
    Local area
    Remote work
    Worldwide

    BLUE ORIGIN

    Cupertino, CA
    6 days ago
  • $127.63k - $191.2k

     ...ImpactAs a key CAD member of Marvell Central Engineering, you will play a leading role on developing next-generation Agentic design verification workflow and its add-on tools....  ...on:Develop and deploy agentic workflows for ASIC verification activities.Automate regression... 
    Senior
    Permanent employment
    Internship
    Work from home

    Marvell

    Santa Clara, CA
    2 days ago
  • $150k - $250k

    Job Title: Senior ASIC Design EngineerJob Location: Santa Clara, CA or Boston, MACompensation: $150K - $250K base DOE plus equityRequirements...  ...OverviewWe are seeking a highly skilled Senior ASIC Design Engineer to lead the design and development of advanced ASIC solutions.... 
    Senior

    CyberCoders

    Santa Clara, CA
    1 day ago
  • $168k - $264.5k

    We are now looking for a Senior ASIC Design Engineer.NVIDIA is seeking ASIC Design Engineers to implement the world’s leading SoC's and GPU's. This position offers the opportunity to have real impact in a multifaceted, technology-focused company impacting product lines... 
    Senior
    Full time
    Work experience placement

    Nvidia

    Santa Clara, CA
    3 days ago
  •  ...NVIDIA Corporation in Santa Clara, CA, seeks ASIC Design Engineers with experience in agentic AI to design and implement world-leading SoCs and GPUs. Join the AI for chip design team and tap into AI's potential to transform chip design. You will develop RTL in Verilog... 
    Senior

    Jobleads-US

    Santa Clara, CA
    2 days ago
  •  ...NVIDIA Corporation is seeking an ASIC Design Engineer for our Santa Clara, CA team. You will implement GPU sub-system modules, perform architectural trade-offs, and deliver fully verified RTL designs meeting timing and power goals. Requirements include a Master’s in... 
    Senior

    Jobleads-US

    Santa Clara, CA
    2 days ago
  • $196k - $310.5k

     ...We are now looking for a Senior ASIC Floorplan Design Engineer! NVIDIA is seeking a talented ASIC Floorplan Engineer to design and implement the world’s leading SoC's and GPU's. This position offers you a unique opportunity to craft and to influence the design and development... 
    Senior
    Work experience placement

    Jobleads-US

    Santa Clara, CA
    2 days ago
  • $168k - $264.5k

     ...NVIDIA is seeking ASIC Design Engineers with experience in agentic AI to help design and implement the world's leading SoC's and GPU's. As part of NVIDIA's "AI for chip design" team, you will have the opportunity to tap into the unlimited potential of AI and change the... 
    Senior
    Work experience placement

    Jobleads-US

    Santa Clara, CA
    2 days ago
  • $150k - $220k

     ...orbit (LEO) space system that will fundamentally change the design, economics, manufacturing and service delivery associated with...  ...our overall quality of life. We are seeking a Senior ASIC Design Engineer to join our processor subsystem team, focused on the configuration... 
    Senior
    Full time
    Work at office
    Immediate start
    Visa sponsorship
    Night shift

    E-Space

    Saratoga, CA
    a month ago
  • $106.4k - $172.15k

     ...stronger relationships, and the kind of precision that drives great outcomes. Job Summary Your Career As a Design Verification engineer on the ASIC team, you will ensure that the ASICs in our groundbreaking next-generation firewall products meet or exceed industry... 
    Senior
    Full time
    Casual work
    Work at office

    Palo Alto Networks

    Santa Clara, CA
    2 days ago
  •  ...is delivered for millions of patients worldwide.We’re a team of engineers, clinicians, and innovators united by one purpose: to make...  ....Job DescriptionPrimary Function of Position The Human Factors Design Engineer (HFDE) is part of the Human Factors (HF) organization... 
    Senior
    Work at office
    Local area
    Worldwide
    Flexible hours

    Intuitive Surgical

    Sunnyvale, CA
    3 days ago
  • $125.7k - $203.1k

     ...grow. Because full product development—from design to qualification to production—is within...  ...world. Your Impact As a Physical Design Engineer, you will play a key role in the full RTL...  ...and work experience should be in ASIC Physical Design, ASIC design, engineeringor... 
    Full time
    Temporary work
    Work experience placement
    Internship
    Local area
    Flexible hours

    CISCO Systems

    San Jose, CA
    2 days ago
  •  ...optical interconnects to scalable photonic engines, Lumilens is unlocking a new era of...  ...systems, and scale. Every line of code, every design decision, every breakthrough you help...  ...design team developing high‑performance ASIC using TSMC advance process nodes, including... 
    Senior

    Lumilens

    San Jose, CA
    3 days ago
  •  ...role, you will lead and contribute to advanced-node physical design for complex ASIC and SoC products, driving implementation, timing closure,...  ...with architecture, RTL, CAD, technology, and product engineering teams, you will help deliver high-quality silicon while advancing... 
    Senior

    Advanced Micro Devices , Inc.

    Santa Clara, CA
    2 days ago
  • $107.4k - $161.2k

     ...Company:Qualcomm Technologies, Inc.Job Area:Engineering Group, Engineering Group ASICS EngineeringGeneral Summary:As a leading technology innovator, Qualcomm...  ...As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate,... 
    Work from home

    Nutanix

    Santa Clara, CA
    1 day ago
  • $167.7k - $245.2k

     ...and help each other grow. Because full product development—from design to qualification to production—is within our team, we’re able to...  ...digital world. Your Impact Set vision and strategy for ASIC verification methodology and execution across multiple programs... 
    Full time
    Temporary work
    Local area
    Flexible hours

    Cisco

    San Jose, CA
    1 day ago
  • $107.4k - $161.2k

     ...Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group ASICS Engineering General Summary: As a leading...  ...As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement... 
    Work from home

    Qualcomm

    Santa Clara, CA
    1 day ago
  • $116k - $189.75k

     ...lasting impact on the world. At NVIDIA, our passion for innovative technology and dedication to excellence guide us. As an ASIC Design Engineer, you will build powerful SoC and GPU products. These products support everything from consumer graphics to self-driving cars... 
    Work experience placement

    Jobleads-US

    Santa Clara, CA
    2 days ago
  •  ...NVIDIA is seeking an ASIC Design Engineer in Santa Clara to build powerful SoC and GPU products. You will draft microarchitectures, implement RTL in Verilog, and drive verification across multiple IPs including GPU components. The role requires 2+ years of RTL experience... 

    Jobleads-US

    Santa Clara, CA
    2 days ago
  •  ...Microsoft Azure, and Oracle.THE PERSON:We are seeking a high‑impact Design Verification Engineer with strong technical depth, ownership, and the ability to drive verification closure on complex, high‑performance ASIC designs.The ideal candidate brings hands‑on verification... 
    Senior

    AMD

    Santa Clara, CA
    2 days ago
  •  ...Cisco’s Silicon One team is seeking a Physical Design Engineer to lead RTL-to-GDSII implementation for cutting-edge Networking chips. You will...  ...high-performance silicon. The role requires expertise in ASIC physical design concepts, floor planning, clock and power distribution... 

    Jobleads-US

    San Jose, CA
    2 days ago
  • $195k - $226k

     ...Job Description Job Description Staff ASIC/SoC Design Engineer Location: Santa Clara, CA | Candidates must currently reside in California Schedule: Full-Time M-F, 4 days onsite Compensation: $195,000 - $226,000 base salary. Base salary is determined based... 
    Full time
    Flexible hours

    Certified Employment Group

    Santa Clara, CA
    17 days ago
  • $119.85k - $162.15k

     ...with great opportunity for professional growth. Find your future with us. Boeing Defense, Space and Security is hiring ASIC Design Engineers — Design-for-Test (DFT) & Physical Design (Synthesis and Timing) at various levels of experience to join the team in Mountain... 
    Senior
    Permanent employment
    Work experience placement
    Interim role
    Relocation
    Visa sponsorship
    Work visa
    Flexible hours
    Shift work
    Day shift

    Jobleads-US

    Mountain View, CA
    2 days ago
  •  ...We are looking for a Senior Principal Physical Design Engineer to own the top-level floorplan, global power networks, and timing budgets...  ...Exceptional collaboration skills to bridge technical gaps between internal block owners and external ASIC/IP vendors #J-18808-Ljbffr
    Senior

    ACL Digital

    San Jose, CA
    2 days ago
  • $119.85k - $239.2k

    ASIC Design Engineers — Design-for-Test (DFT) & Physical Design (Synthesis and Timing) – (Experienced, Lead, or Senior) Company: The Boeing Company Boeing Defense, Space and Security is hiring ASIC Design Engineers — Design-for-Test (DFT) & Physical Design (Synthesis... 
    Senior
    Permanent employment
    Full time
    Work experience placement
    Interim role
    Relocation
    Visa sponsorship
    Work visa
    Flexible hours
    Shift work
    Day shift

    Boeing

    Mountain View, CA
    6 days ago
  • $175.8k - $312.2k

     ...team transforming hardware technology? We are searching for a dedicated engineer to join our exciting team of problem solvers. Description The ideal candidate will have experience in ASIC design with: - Architecture research and/or development of memory or highly interconnected... 
    Full time
    Relocation

    Apple

    Santa Clara, CA
    2 days ago
  • $110.6k - $140k

     ...from tapeout to mass production. Candidate designs a characterization/testing plan and works with R&D teams and manufacturing engineers on technical issues, resolving these issues...  ...introduction and ramp-up for image sensors and ASIC devices.Analyze yield and drive corrective... 
    Senior

    Omnivision Technologies

    Santa Clara, CA
    3 days ago
  •  ...Advanced Micro Devices, Inc. in San Jose, CA is seeking a hardware design engineer to contribute to FPGA product development within the AECG group. You will participate in RTL development, implement complex digital and mixed-signal blocks, and collaborate with cross... 
    Senior

    Jobleads-US

    San Jose, CA
    2 days ago
  • $141.91k - $269.1k

     ...technology, a rich IP portfolio, a world-class design ecosystem, and an operationally resilient...  ...(ADG) - The Senior DFT Logic Design Engineer provides technical support to Intel...  ...training/presentations.Drive quality of ASIC DFT/DFM and ATPG validation methodology,... 
    Senior
    Full time
    Internship
    Local area
    Immediate start
    Shift work

    Intel

    Santa Clara, CA
    1 day ago
  • $133k - $180k

     ...interconnected world. Our solutions are designed to not only meet the current demands of...  ...several prestigious awards, such as Best Engineering Team, Best Company for Diversity, Compensation...  ...dense BGA fan-out for high-pin-count ASICs and FPGAs Optical Transceiver PCB... 
    Senior
    Flexible hours

    Arista Networks, Inc.

    Santa Clara, CA
    2 days ago

Do you want to receive more vacancies?

Subscribe and receive similar vacancies to Sr. Staff ASIC Design Engineer. Be the first to apply!