RTL Design and Integration Engineer, TPU and ML

RTL Design and Integration Engineer, TPU and ML corporate_fare Google place Sunnyvale, CA, USA Apply Qualifications Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. 4 years of experience in ASIC RTL design, with a focus on clocking, reset, or timing‑critical RTL development. Design experience optimizing for performance, power, and area. Experience with digital design fundamentals and microarchitecture design. Experience working cross‑functionally with DV and PD teams. Preferred Qualifications Master's degree or Ph.D. in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture. 4 years of RTL design experience. Experience with Linting, CDC, RDC, LEC. Experience with scripting languages (e.g., Python or Perl). Experience with integration. Experience optimizing RTL solutions, RTL design methodologies, and automating front‑end engineering flows. About the Job In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting‑edge TPU technology that powers Google’s most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google’s TPU. You’ll contribute to the innovation behind products loved by millions worldwide and leverage your design and verification expertise to verify complex digital designs, specifically focusing on TPU architecture and its integration within AI/ML‑driven systems. In this role, you will join the team designing and developing the On‑Chip Network of Google’s next‑generation Tensor Processing Units (TPUs), the custom‑built accelerators powering our AI and machine learning workloads in data centers. You will be responsible for the microarchitecture, design, implementation, and integration of key digital logic blocks within the TPU. This role requires close collaboration with cross‑functional teams, including verification, physical design, validation, and firmware, to deliver hardware. You will own critical design deliverables, help with integration efforts, and contribute to the continuous improvement of our design methodologies and flows. As an RTL Design Engineer on the TPU team, you will be a key contributor to the development of Google’s AI accelerators. You will leverage your expertise in digital logic design, computer architecture, and RTL coding to create innovative and efficient hardware solutions. Responsibilities Define and document complex microarchitecture for the TPU, writing high‑quality, performant, and power‑efficient Register Transfer Level (RTL) code primarily in SystemVerilog. Partner with cross‑functional teams to drive block‑level and chip‑level integration efforts for the machine learning accelerators. Collaborate closely with the verification team to develop robust test plans, debug RTL, and guarantee overall functional correctness. Support post‑silicon validation and debugging efforts while contributing to the continuous enhancement of internal design tools, flows, and methodologies. Work closely with the physical design team to meet timing, area, power, and manufacturability requirements. Salary and Benefits The US base salary range for this full‑time position is $138,000‑$198,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google. Equal Employment Opportunity Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents-to-be, criminal histories consistent with legal requirements, or any other basis protected by law. See also Google’s EEO Policy, "Know your rights: workplace discrimination is illegal", Belonging at Google, and How we hire. Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting. #J-18808-Ljbffr Google Inc.