Sign up to access all features of our service.
  • Job search
  • Favorites
  • Create a CV
    New
  • Salaries
  • Subscriptions

Senior ASIC Physical Design Lead RTL-to-GDSII

$183.8k - $263.6k

Cisco

Cisco Systems, Inc. is seeking an experienced Physical Design Engineer to contribute to innovative hardware platforms. The ideal candidate will hold a Bachelor’s Degree in Electrical Engineering and possess over 8 years of Physical Design experience, including working on Fullchip activities. The position includes responsibilities such as floorplan design, collaboration with various teams, and implementation using industry-standard tools. Cisco offers a competitive salary range of $183,800 – $263,600, reflecting market conditions for U.S. locations. #J-18808-Ljbffr

Vacancy posted 11 hours ago
Similar jobs that could be interesting for youBased on the Senior ASIC Physical Design Lead RTL-to-GDSII in San Jose, CA vacancy
  • Synopsys is seeking an experienced ASIC Digital Design Manager in Sunnyvale, California. You will lead a team focused on USB digital design and architecture, overseeing RTL design execution and mentoring engineers. Ideal candidates have 12+ years of experience with strong... 
    Senior

    Synopsys

    Sunnyvale, CA
    4 days ago
  • $250k - $280k

    A Silicon Valley hardware startup is seeking a hands-on ASIC Chip Design Lead to manage chip design execution from micro-architecture through integration...  ...and timing signoff. This role requires expertise in RTL design and the ability to lead across design teams in a fast-... 
    Senior

    Eridu

    Saratoga, CA
    17 hours ago
  • $192k - $278k

    Physical Design Technical Lead, ASIC, TPU corporate_fare Google place Sunnyvale, CA, USA Apply Bachelor's degree in Electrical Engineering, Computer...  ...and team needs. Manage the full design cycle from RTL to GDSII, including critical sign-off closures for timing, electrical... 
    Suggested
    Full time
    Worldwide

    Google Inc.

    Sunnyvale, CA
    2 days ago
  • $220k - $250k

     ...We're looking for a seasoned RTL Design Tech Lead to drive micro-architecture,...  ...execution for complex ASIC/SoC programs. This role combines...  ...of RTL engineers (junior to senior ICs). Drive design reviews...  ...Design Verification (DV) Physical Design (PD) STA / Timing /... 
    Suggested
    Work from home

    Bolt Graphics

    Sunnyvale, CA
    4 days ago
  • $192k - $278k

    Google Inc. in Sunnyvale, CA is looking for a Physical Design Technical Lead to spearhead the physical design implementations for their advanced AI...  ...along with 10 years of experience in leading high-complexity ASIC design projects. As part of a dynamic team, you will... 
    Suggested
    Full time
    Worldwide

    Google Inc.

    Sunnyvale, CA
    2 days ago
  • A leading technology company in California seeks a seasoned Physical Design Engineer to lead projects in advanced semiconductor technology. The ideal candidate will have 8-10 years of experience in the RTL-to-GDS flow and proficiency with EDA tools such as Fusion Compiler... 
    Senior

    Synopsys, Inc.

    Sunnyvale, CA
    17 hours ago
  • Hewlett Packard Enterprise Development LP is seeking a Principal Physical Design Engineer to develop advanced ASIC design methodologies in Sunnyvale, California. This key role involves enhancing RTL-to-GDS flows, providing physical design support, and ensuring implementation... 
    Senior

    Hewlett Packard Enterprise Development LP

    Sunnyvale, CA
    17 hours ago
  •  ...A leading semiconductor company is seeking a highly experienced Physical Design Verification Lead in San Jose, California. The role involves ensuring the physical integrity of high-performance chip designs and requires expertise in Electronic Design Automation tools. Candidates... 
    Senior

    TSMC - Taiwan Semiconductor Manufacturing Company Limited

    San Jose, CA
    3 days ago
  • GlobalFoundries is seeking a Senior Principal IP Design Engineer in Santa Clara to lead and own RTL development for efficient, low-power CPU cores. You will drive multiple micro-architecture strategies, ensuring performance and area optimizations while assisting in functional... 
    Senior

    GlobalFoundries

    Santa Clara, CA
    2 days ago
  • Synopsys, Inc. is looking for an experienced IC physical design expert to lead complex digital implementations. This role involves managing local and remote teams, ensuring high-quality sign-offs on silicon solutions, and driving technical innovation. The ideal candidate... 
    Senior
    Local area
    Remote work

    Synopsys, Inc.

    Sunnyvale, CA
    1 day ago
  •  ...cars to learning machines. We lead in chip design, verification, and IP...  ...: You are an experienced IC physical design expert, with strong leadership...  ..., analog, PM/PEMs. Drive RTL, design partitioning, timing...  ...qualification Hands‑on RTL‑GDSII physical implementation... 
    Local area
    Remote work

    Synopsys, Inc.

    Sunnyvale, CA
    1 day ago
  • $183k - $389.5k

     ...technology company in Sunnyvale is looking for an experienced Distinguished Technologist, ASIC Design Architect. The role involves owning complex ASIC delivery, defining architecture, and leading engineering teams. Ideal candidates should have 15+ years in ASIC design and... 
    Senior

    Hewlett Packard Enterprise

    Sunnyvale, CA
    2 days ago
  • A semiconductor startup in Sunnyvale is seeking an experienced RTL Design Tech Lead to drive micro-architecture and RTL development for complex ASIC/SoC programs. The role requires 10+ years of experience in RTL design and leadership skills, guiding teams from architecture... 

    Bolt Graphics, Inc.

    Sunnyvale, CA
    17 hours ago
  •  ...Micron Technology, Inc. in San Jose, California, is seeking experienced ASIC designers to innovate memory and storage solutions. In this role, you'll define micro-architectures and develop RTL while ensuring design integrity. Ideal candidates have 10+ years of ASIC design... 
    Senior
    Full time

    Micron Technology

    San Jose, CA
    10 hours ago
  •  ...A leading semiconductor company is seeking a Senior ASIC Design Engineer to join their Silicon Design team in San Jose, CA. The ideal candidate will oversee the complete RTL design lifecycle for next-generation embedded products, ensuring design quality and timing closure... 
    Senior

    Advanced Micro Devices , Inc.

    San Jose, CA
    3 days ago
  •  ...SPACE EXPLORATION TECHNOLOGIES CORP is looking for a motivated SR. RTL DESIGN ENGINEER in Sunnyvale, CA to develop cutting-edge ASICs for Starlink. This role includes responsibilities in evaluating design architectures, implementing RTL in Verilog/System Verilog, and... 
    Senior

    SPACE EXPLORATION TECHNOLOGIES CORP

    Sunnyvale, CA
    10 hours ago
  • $192k - $278k

    ASIC Physical Design Tools, Flows, Methodologies Manager Google Sunnyvale, CA, USA Bachelor's degree...  ...experience with the register-transfer level (RTL)-to-GDS process and industry-standard...  .... In this role, you will manage and lead a team of TFM engineers responsible for... 
    Full time
    Worldwide

    Google Inc.

    Sunnyvale, CA
    1 day ago
  •  ...SPACE EXPLORATION TECHNOLOGIES CORP (SpaceX) in Sunnyvale, CA is looking for a Sr. SOC/ASIC Physical Design Engineer. The role involves developing cutting-edge silicon for deployment in space and improving physical design methodologies to enhance the Starlink network.... 
    Senior

    SPACE EXPLORATION TECHNOLOGIES CORP

    Sunnyvale, CA
    3 days ago
  •  ...A tech-focused company in San Jose is seeking exceptional Physical Design engineers to own block-level implementation and verification. Responsibilities...  ...timing closure and PPA optimization, collaborating with RTL Designers, and supervising design flow improvements. Ideal... 
    Senior

    ETCHED LLC

    San Jose, CA
    3 days ago
  • $120k - $192k

     ...Itlearn360 is seeking a Senior ASIC Physical Design Engineer to contribute to SerDes connectivity ASICs at their data center products. Candidates should have an MS in Electrical or Computer Engineering and over 6 years of physical design experience. This role requires... 
    Senior

    Itlearn360

    San Jose, CA
    3 days ago
  •  ...Broadcom Inc. is looking for a Physical Design Engineer to join the ASIC Products Division in San Jose, CA. This role involves working with cutting-edge technology to drive next-gen AI designs while executing Physical Design and Verification processes. The ideal candidate... 
    Senior

    Broadcom Corporation

    San Jose, CA
    3 days ago
  • $170k - $230k

    SpaceX is seeking a Sr. SOC/ASIC Physical Design Engineer to develop next-generation silicon for space and ground infrastructures. You'll work with top engineers across various disciplines to enhance the Starlink network, enabling connectivity globally. Ideal candidates... 
    Senior

    jobr.pro

    Sunnyvale, CA
    2 days ago
  • NVIDIA Gruppe is looking for a skilled physical designer to handle the design and implementation of GPUs and other ASICs targeted at diverse markets such as desktop and mobile. Ideal candidates will possess at least 5 years of experience in VLSI design implementation, with... 
    Senior

    NVIDIA Gruppe

    Santa Clara, CA
    2 days ago
  • A cutting-edge technology company is seeking a Sr. Staff HW Engineer for ASIC Implementation to lead RTL integration across DSP ASIC programs. The role includes driving implementation flows, coordinating backend partnerships, and supporting timing closure. Strong experience... 
    Senior

    Arycs Technologies, Inc.

    Los Gatos, CA
    3 days ago
  • $200k - $220k

     ...Staff / Senior Staff Physical Design Engineer Bolt Graphics is a semiconductor startup...  ...from netlist to GDSII. You will play a critical role...  ...clean signoff Work closely with RTL, architecture, and verification...  ...8–12 years of experiencein ASIC physical design Proven experience... 
    Senior

    Bolt Graphics, Inc.

    Sunnyvale, CA
    3 days ago
  • $250k - $280k

     ...been widely validated by leading hyperscalers. Eridu...  ...are seeking a hands-on ASIC Chip Design Lead to own chip...  ...This role sits between senior individual contributor...  ...will personally drive RTL and micro-architecture...  ...design, verification, and physical design teams. This is... 
    Full time

    Eridu Corporation

    Saratoga, CA
    2 days ago
  • A leading technology company is looking for an experienced technical manager in Sunnyvale to drive the development of custom silicon for...  ..., ensure timely execution, and leverage expertise in design synthesis and verification. A Bachelor's degree in engineering... 
    Remote job
    Worldwide

    Google Inc.

    Sunnyvale, CA
    2 days ago
  •  ...Cornelis Networks, Inc. is looking for a Senior Principal ASIC Design Engineer to develop world-class SoCs for high-performance computing and AI networking...  ...networking protocols. The role involves collaborating on RTL designs, timing optimization, and post-silicon validation.... 
    Senior
    Remote work

    Cornelis Networks, Inc.

    San Jose, CA
    3 days ago
  • $136k - $218.5k

    ## Senior LPU ASIC EngineerApplylocations: US, CA, Remote...  ...technology! As we lead innovation in AI...  ...progress in chip design. At NVIDIA, you’ll...  ...enable efficient physical implementation.*...  ...compliance for successful GDSII handoff and...  ...through the complete RTL-to-GDSII flow,... 
    Senior
    Remote work

    NVIDIA Corporation

    Santa Clara, CA
    4 days ago
  • $136k - $265k

     ...NVIDIA Gruppe is seeking a Senior ASIC Design Engineer for its Memory Controller team in Santa Clara, California. This role involves collaboration with architects and engineers to design and verify micro-architectures for memory subsystems. The ideal candidate will have... 
    Senior

    NVIDIA Gruppe

    Santa Clara, CA
    3 days ago

Do you want to receive more vacancies?

Subscribe and receive similar vacancies to Senior ASIC Physical Design Lead RTL-to-GDSII. Be the first to apply!