Senior IC Package Design Engineer (RF/SiP)
SpaceX
SpaceX in Austin, TX seeks a Sr. IC Package Design Engineer (Silicon Engineering) to lead packaging for in‑house ASICs and RFICs for Starlink and space systems. You will own package selection, SIP/BGA configurations, layout, and verification, collaborating with cross‑functional teams to optimize signal integrity, power delivery, and manufacturability. You will drive packaging methodology, perform SI/PI analyses, and support tapeout while applying Cadence tools and advanced substrates. #J-18808-Ljbffr SpaceX
Vacancy posted 6 hours ago
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