Senior DFT/ATPG Design Engineer for SoC & ASICs
Tiltedge Solutions
Tiltedge Solutions in Santa Clara, CA seeks an experienced DFT/ATPG engineer to own test architecture for SoC/ASICs, focusing on controllability, observability, and scan-based testing. You will design and optimize test strategies to ensure high-quality silicon. The role requires leading ATPG pattern generation, MBIST memory test architectures, and IO test validation, collaborating with RTL and digital design teams in a fast-paced program. Strong analytical and communication skills are essential. #J-18808-Ljbffr
Vacancy posted 5 days ago
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