Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering)
$170k - $230kJobr
SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. SR. SOC/ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we’re leveraging our experience in building rockets and spacecraft to deploy Starlink, the world’s most advanced broadband internet system. Starlink is the world’s largest satellite constellation and is providing fast, reliable internet to millions of users worldwide. We design, build, test, and operate all parts of the system – thousands of satellites, consumer receivers that allow users to connect within minutes of unboxing, and the software that brings it all together. We’ve only begun to scratch the surface of Starlink’s potential global impact and are looking for best‑in‑class engineers to help maximize Starlink’s utility for communities and businesses around the globe. We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world‑class cross‑disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing cutting‑edge next‑generation silicon for deployment in space and ground infrastructures around the globe. These chips are enabling connectivity in places it has previously not been available, affordable or reliable. Your efforts will help deliver cutting‑edge solutions that will expand the performance and capabilities of the Starlink network. RESPONSIBILITIES Perform partition synthesis and physical implementation steps (e.g. synthesis, floorplanning, power/ground grid generation, place and route, timing, noise, physical verification, electromigration, voltage drop, logic equivalency and other signoff checks) Develop/improve physical design methodologies and automation scripts for various implementation steps Closely collaborate with the ASIC design team to drive architectural feasibility studies, develop timing, power and area design targets, and explore RTL/design tradeoffs Resolve design/timing/congestion and flow issues, identify potential solutions and drive execution Run, debug, and fix signoff closure issues in static timing analysis (STA), noise, logic equivalency, physical verification, electromigration and voltage drop BASIC QUALIFICATIONS Bachelor’s degree in electrical engineering, computer engineering or computer science 5+ years of ASIC and/or physical design flow development experience in industry PREFERRED SKILLS AND EXPERIENCE Strong experience in ASIC/SOC RTL2GDSII physical design and signoff flows Strong experience with industry standard EDA tools including understanding of their capabilities and underlying algorithms Knowledge of deep sub‑micron FinFET and CMOS solid state physics Knowledge of CMOS digital design principles, basic standard cells their functionality, standard cell libraries Understanding of CMOS power dissipation in deep submicron processes leakage/dynamic Familiar with CMOS analog circuit and physical design Knowledge of DFT/Scan/MBIST/LBIST and understanding of their impact on physical design flows Good scripting skills (csh/bash, Perl, Python, TCL, Makefile etc.) Self‑driven individual with a can‑do attitude, willing to learn, and an ability to work in a dynamic group environment ADDITIONAL REQUIREMENTS Ability to work extended hours and weekends as needed to meet critical project milestones COMPENSATION AND BENEFITS Pay range: Physical Design Engineer/Senior: $170,000.00 - $230,000.00 per year Your actual level and base salary will be determined on a case‑by‑case basis and may vary based on the following considerations: job‑related knowledge and skills, education, and experience. Base salary is just one part of your total rewards package at SpaceX. You may also be eligible for long‑term incentives, in the form of company stock, stock options, or long‑term cash awards, as well as potential discretionary bonuses and the ability to purchase additional stock at a discount through an Employee Stock Purchase Plan. You will also receive access to comprehensive medical, vision, and dental coverage, access to a 401(k) retirement plan, short & long‑term disability insurance, life insurance, paid parental leave, and various other discounts and perks. You may also accrue 3 weeks of paid vacation and will be eligible for 10 or more paid holidays per year. Exempt employees are eligible for 5 days of sick leave per year. ITAR REQUIREMENTS To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITAR here. SpaceX is an Equal Opportunity Employer; employment with SpaceX is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status. #J-18808-Ljbffr
$170k - $230k
SpaceX is seeking a Sr. SOC/ASIC Physical Design Engineer to develop next-generation silicon for space and ground infrastructures. You'll work with top engineers across various disciplines to enhance the Starlink network, enabling connectivity globally. Ideal candidates...Senior- An established industry player is seeking a skilled Physical Design Engineer to join their innovative team. In this long-term contract role, you... ...design issues, and contribute to the integration of ASIC/SoC designs. If you have a passion for physical design and want...SuggestedLong term contractRemote work
- ...enabling human life on Mars. SR. RTL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we’... ..., product engineering, ASIC implementation). In this role... ...those IPs and support the physical implementation team (synthesis... ...power optimization ASIC/SoC system integration experience...SeniorWorldwide
- ...Senior ASIC Design Engineer – AMD NTSG At AMD, our mission is to build great... ...implementation support tapeout silicon bring‑up production ramp and... ...of ASIC IPs into larger SoC and system architectures Produce... ...condition, mental or physical disability, national origin,...Senior
- ...California, is seeking a skilled engineer to join their wireless silicon development team. This role involves defining ASIC microarchitecture and... ...teams to ensure successful SoC integration. Applicants should... ...industries, with expertise in ASIC design flows and cross-functional...Suggested
$170k - $230k
...Location Sunnyvale, CA Job Title SR. RFIC DESIGN ENGINEER (SILICON ENGINEERING) Overview SpaceX is actively... ...with system architects, modem/DSP, and ASIC engineers to partition functions... ...identity, marital status, mental or physical disability or any other legally protected...SeniorTemporary workWorldwideWeekend work- ...based in Santa Clara, California is looking for an experienced ASIC Design Engineer to join their Integrated Wireless Technology team. As a key... ...experience in ASIC design, low power strategies, and silicon debug. This role offers a competitive salary and benefits package...Senior
$170k - $230k
...enabling human life on Mars. SR. FULL CHIP PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we... ...of users worldwide. We design, build, test, and operate... ..., product engineering, ASIC implementation). In this... ...flows for advanced node SoC's. Interpret and implement...SeniorPermanent employmentTemporary workWorldwideWeekend work- ...highly motivated and collaborative Silicon Engineering leader with strong technical... ...this role, you will lead a team of design engineers to deliver next‑generation SoC and compute technologies,... ...status, medical condition, mental or physical disability, national origin, race...Senior
$237k - $296k
...seeking a high-caliber Sr. Staff Design Verification Engineer to join our ADAS and Inference Silicon team. You will be... ...our next-generation SoC. Responsibilities Drive... ...industry experience in ASIC design verification.... ...or characteristics, physical or mental disability,...SeniorFull timeContract workTemporary workPart timeLocal areaShift workNight shift$200k - $220k
Staff / Senior Staff Physical Design Engineer Bolt Graphics is a semiconductor startup... ...8-12 years of experiencein ASIC physical design Proven... ...-speed interfaces or complex SoCs (CPU/GPU/AI) Exposure toGLS and timing‑related silicon debug Scripting expertise inPython...Senior$100k
...and looking for contributors of all seniorities. Tenstorrent is seeking a SoC Physical Design Verification Engineer to drive full-chip signoff and ensure manufacturable, high-quality silicon across advanced technology nodes. You’ll lead physical verification closure...Permanent employmentFull time$120k - $192k
...Itlearn360 is seeking a Senior ASIC Physical Design Engineer to contribute to SerDes connectivity ASICs at their data center products. Candidates should have an MS in Electrical or Computer Engineering and over 6 years of physical design experience. This role requires...Senior$141.8k - $258.6k
...As part of our Digital Design Engineering group, you’ll take... ...at the center of our SOC design effort, collaborating... ...engineers. As a Physical Design Engineer, you will... ...library cells for complete Silicon Validation. Minimum... ...IPs. Familiar with ASIC integration flows, including...Relocation- ...talented and detail-oriented ASIC Design Verification (DV) Engineer to join our chip design... ...(ICs) for groundbreaking silicon photonics and optical interconnect... ...experience in ASIC/SoC design verification. UVM Expertise... .... Exposure to physical layer (PHY) or mixed-signal...
- ...Responsibilities AMD, Inc., is hiring a Sr. Silicon Design Engineer to: Research, design,... ..., and documentation for ASIC development. Determine... ...architecture, GPU architecture, or SoC architecture Experience may... ...condition, mental or physical disability, national origin,...SeniorWork experience placementInternship
- ...A high-speed connectivity firm in San Jose is seeking a Senior Physical Design Engineer. This role involves managing all aspects of physical design for SoC projects, focusing on optimization and methodology development. The ideal candidate has over 10 years of experience...Senior
$138k - $198k
Silicon Design Verification Engineer, Quantum AI Apply Mid Experience driving progress,... ...SystemVerilog/UVM. Experience with SOC verification including... ...DV for mixed-signal ASICs containing analog and RF IP... ...of a team of digital, DV, physical design, and radio frequency...Full timeWorldwide$198.7k - $298.1k
...Qualcomm. Our mission is to reimagine silicon and create computing platforms that... ...the most talented and passionate engineers in the world to create designs that push the envelope on... ...efficiency and scalability. As a CPU Physical Design CAD engineer, you will build...SeniorWork experience placementImmediate startWorldwide$220.92k - $311.89k
...highly experienced a Director, SoC Design Engineering, to lead the functional... ...methodologies that ensure first-pass silicon success. As a trusted domain... ...and methodologies), Custom ASIC (leveraging existing IP for... ...origin, ancestry, age, physical or mental disability, medical...Work experience placementLocal areaImmediate startWorldwideShift workNight shift$256.05k - $361.48k
# **Welcome!**## .Senior Physical Design Integration Engineer page is loaded## Senior Physical Design Integration... ...The team is responsible for all SoC level physical design and optimization... ...performance Experience in: Logic Design, VLSI/ASIC Design, Computer Architecture Current...SeniorWork experience placementLocal areaImmediate startFlexible hoursShift work$156k - $229k
...Mechanical, Material, Electrical Engineering, Technology, Science, a... ...chip package substrate design using Cadence APD (... .... Experience in mobile SOC package design in the... ...packaging technologies and new silicon interfaces/subsystems. Experience in physical verification flow...SeniorFull timeWorldwide$135k - $160k
...enabling human life on Mars. SR. ASIC DFT ENGINEER (SILICON ENGINEERING) At SpaceX we’... ...of users worldwide. We design, build, test, and operate all... ..., computer engineering, or physics. 5+ years of experience in... ...yield optimization on complex SoCs or ASICs. Hands‑on...SeniorPermanent employmentTemporary workWorldwideWeekend work- ...beyond. THE ROLE You will contribute to the ASIC (chip) design for high-performance network chips: AINIC... ...work closely with the architecture, IP design, Physical Design teams, and product engineers to achieve first‑pass silicon success. THE PERSON A successful candidate...
- ...microarchitectural design and RTL implementation of Adaptive SoC and FPGA configuration... ...through production silicon across all phases:... ..., verification, physical design integration,... ...closely with test engineers to implement design... ...background experiences in ASIC design. Knowledge...
$116k - $189.75k
...What You'll Be Doing: Drive Physical Design and timing analysis and closure... ...'s GPUs, CPUs, DPUs and SoCs at block level, cluster level... ...higher in Electrical or Computer Engineering (or equivalent experience).... ...in timing convergence for ASICs, CPUs, GPUs or Network...$136k - $212.75k
...looking for a top-notch ASIC engineer to join the team. The... ...with the front design team to understand the... ...team to help craft the physical floorplan of the chip.... ...The team works with the silicon solution team to triage... ...information to GPU, CPU and SOC verification team,...SeniorWork experience placement$140k - $170k
...Credo is engineering the future of high-speed connectivity... ...Cables (AECs) all designed for maximum performance... ...of connectivity. From silicon architects to systems... ...the Role As a Senior Physical Design Engineer, you will... ...implementation for Credo SoC designs. This role...SeniorLocal area$190.61k - $269.1k
...Overview Intel's AI SoC organization... ...accelerators. If you are an engineer with strong... ...and timing‑clean designs Collaborate closely... ...guidance and support to physical design teams for... ...checks Drive silicon bring‑up and post‑... ...implementation for ASIC/SoC development Preferred...SeniorLocal areaShift work$120k - $220k
E-Space is looking for an experienced Physical Design Engineer to lead complex ASIC and SoC designs. With a focus on innovative satellite technology, you'll work with cutting-edge tools like Cadence Innovus. The role requires a minimum of 8 years of experience in physical...Senior
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