Average salary: $176,960 /yearly

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  • $88.8k - $166.4k

     ...Considering Handson experience with RTL design and Vivado Flow (IP Integrator) ....  ...solutions. Develop and implement RTL and FPGA methodologies for robust designs....  ...Groups Disaster Relief About Capgemini Engineering World leader in engineering and R&D services... 
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    Full time
    Local area
    Flexible hours

    Capgemini

    San Jose, CA
    4 days ago
  •  ...A leading engineering and R&D services firm in San Jose is seeking a professional with expertise in RTL design and Vivado Flow. The role involves collaborating with cross-functional teams, developing RTL methodologies, and performing testing with lab equipment. Candidates... 
    Suggested
    Full time

    Capgemini

    San Jose, CA
    4 days ago
  •  ...A global engineering and R&D services leader is looking for a Talent Acquisition Manager in San Jose, California. The ideal candidate will possess strong RTL design skills and hands-on experience with lab equipment like oscilloscopes and multimeters. You will play a critical... 
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    Full time

    Capgemini Engineering

    San Jose, CA
    4 days ago
  • $124k - $171k

     ...Materials is a global leader in materials engineering solutions used to produce virtually every...  ...and advanced display in the world. We design, build and service cutting-edge equipment...  ...Overview** We are seeking an experienced FPGA Design Engineer with strong expertise in... 
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    Full time
    Relocation

    Applied Materials

    Santa Clara, CA
    15 days ago
  • $90 per hour

    Chipton-Ross is seeking an FPGA Design Engineer for a contract opportunity in Sunnyvale, CA. BASIC QUALIFICATIONS (REQUIRED SKILLS/EXPERIENCE): Experience in ASIC & FPGA development for R&D programs Proficiency in digital signal processing (DSP), high-speed digital... 
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    Contract work
    Day shift

    Chipton‑Ross Inc

    Sunnyvale, CA
    15 days ago
  • $169k - $187k

     ...We are seeking a FPGA Design Engineer who has a passion for working across disciplines (EE, FW/SW) to turn early cutting edge concepts and technologies into reality. As an FPGA Design Engineer, you will be responsible for design of new concepts, technologies and product... 
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    Contract work

    Mackin Talent

    Sunnyvale, CA
    a month ago
  •  ...Job Description: We are seeking a highly motivated and skilled FPGA Verification Engineer to join our dynamic team. In this role, you will be responsible for the verification of complex FPGA designs, ensuring their functionality, performance, and reliability.... 
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    Part time

    Neutrino Advisory, an Inc 5000 Company

    Mountain View, CA
    5 days ago
  •  ...Job Description: We are seeking a highly motivated and skilled FPGA Verification Engineer to join our dynamic team. In this role, you will be responsible for the verification of complex FPGA designs, ensuring their functionality, performance, and reliability.... 
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    Neutrino Advisory, an Inc 5000 Company

    Mountain View, CA
    4 days ago
  • $91.8k - $137.6k

     ...provider of mission-enabling solutions for global security. Our Engineering and Sciences (E&S) organization pushes the boundaries of...  ...with providing the skills, innovative technologies to develop, design, produce and sustain optimized product lines across the sector... 
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    Relocation package
    Shift work

    NORTHROP GRUMMAN

    Sunnyvale, CA
    16 days ago
  • $59 - $74 per hour

     ...A globally leading consumer device company headquartered in Cupertino, CA is looking for a Product Design Engineer to join their dynamic Input Devices team! This team is a passionate, hard-working group of engineers from a diverse set of backgrounds and experience levels... 
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    Contract work
    Part time

    OSI Engineering

    Cupertino, CA
    2 days ago
  •  ...As an ASIC Design Engineer you will contribute to the design and development of high-performance processor and SoC technologies. In this role, you will be responsible for: Key Responsibilities Microarchitecture Development & Specification: Drive the process from... 
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    Part time

    Oho Group Ltd

    Sunnyvale, CA
    5 days ago
  • $120k - $155k

     ...previously thought impossible. We’re looking for exceptional FPGA engineers ready to dive into high-impact projects alongside some of the...  ...minds in the industry. If you're passionate about digital design, solving complex problems, and building products that make a global... 
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    Full time
    Worldwide
    Flexible hours

    Tarana Wireless, Inc.

    Milpitas, CA
    a month ago
  • **Senior FPGA Engineer - Bay Area CA** **About the Job You're Considering** 1. Hands-on experience with **RTL design** and **Vivado Flow (IP Integrator)** . 2. Strong **debugging skills** using standard lab tools. 3. Familiarity with essential lab equipment- **oscilloscope... 
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    Full time
    Local area
    Flexible hours

    Capgemini

    San Jose, CA
    20 days ago
  •  ...ASIC Design Verification Engineer Client Overview Our client is building the first latency optimized SoC for their industry. Using its proven...  ...SERDES based high speed interfaces, i.e. MIPI, PCIe and USB. FPGA prototyping experience. Knowledge in ISO-26262 ASIL... 
    Suggested
    Full time
    Night shift

    SQL Pager LLC

    Sunnyvale, CA
    4 days ago
  •  ...Principal/Senior Staff/Staff ASIC Design Engineer (RISC-V) Client Overview Client is building the first latency optimized SoC for their...  ...experience in RISC-V ISA specifications and the design compliances. FPGA Design Prototyping for pre-silicon design validation... 
    Suggested
    Full time
    Night shift

    SQL Pager LLC

    Sunnyvale, CA
    4 days ago
  •  ...A leading engineering firm in San Jose is seeking a Senior FPGA Engineer to develop and implement RTL and FPGA methodologies. The ideal candidate will have hands-on experience with RTL design and Vivado Flow, strong debugging skills, and proficiency with oscilloscopes... 
    Full time
    Flexible hours

    Capgemini

    San Jose, CA
    4 days ago
  •  ...Company AMD is searching for a Mixed Signal Model Verification Engineer for a 1-year project (possible extension) at their beautiful...  ...circuit schematic Strong background in analog integrated circuit design Proficiency in RTL design languages like SystemVerilog... 
    Part time
    Work at office

    TPI Global Solutions

    Santa Clara, CA
    5 days ago
  • $124k - $201.5k

     ...experienced and highly motivated Senior Component Engineer to join our exciting, fast growing...  ...in multiple technologies (ASIC, FPGA, Comm IC, Processor, SSD) with expert level...  ...component and product level qualification and design verification testing (DVT practices, HALT... 
    Full time
    Contract work
    Work at office

    Palo Alto Networks

    Santa Clara, CA
    25 days ago
  •  ...Position: Silicon Design Package Engineer Location - Santa Clara, CA Contract This role is highly specialized in semiconductor packaging design, requiring strong EDA tool proficiency and knowledge of advanced packaging technologies Tools & Knowledge: Mentor... 
    Contract work
    Part time

    AceStack

    Santa Clara, CA
    33 minutes agonew
  • $143.3k

     ...services. Annapurna Labs (our organization within AWS UC) designs silicon and software that accelerates innovation. Customers choose...  ...to assign projects that help our team members develop your engineering expertise so you feel empowered to take on more complex tasks... 
    Local area

    Annapurna Labs (U.S.) Inc.

    Cupertino, CA
    16 days ago
  • $122k - $170k

     ...edge in an increasingly interconnected world. Our solutions are designed to not only meet the current demands of the digital landscape...  ...has earned us several prestigious awards, such as Best Engineering Team, Best Company for Diversity, Compensation, and Work-Life... 
    Work experience placement

    Arista Networks

    Santa Clara, CA
    a month ago
  •  ...and memory subsystem architects to ensure cohesive system-level design. Specify architecture requirements, conduct early-stage...  ...EXPERIENCE REQUIREMENTS BS or MS or PhD in Electrical/Computer Engineering or related field. Proven track record in delivering... 

    Advanced Micro Devices

    San Jose, CA
    4 days ago
  •  ...A cutting-edge technology company in California is seeking a Senior ASIC Design Engineer to develop high-performance logic for AI applications. The ideal candidate will have over 5 years of hands-on experience with ASIC design and expertise in SystemVerilog. You will collaborate... 
    Full time
    Flexible hours

    Persimmons, Inc.

    San Jose, CA
    4 days ago
  •  ...A leading technology innovator is seeking a Senior ASIC Design Engineer to join their team in San Jose, California. In this role, you will design high performance compute and high-speed data transport logic specifically for AI inference workloads, collaborate with verification... 
    Full time

    Talently

    San Jose, CA
    4 days ago
  • $108k - $167.5k

     ...Senior Physical Design Engineer (7051) TSMC Join to apply for the Senior Physical Design Engineer(7051) role at TSMC . Overview of Role As a Senior Physical Design Engineer, you will be responsible for the physical design implementation PnR run, Performance... 
    Full time
    Internship
    Work at office
    Flexible hours

    TSMC

    San Jose, CA
    4 days ago
  •  ...worldclass team and play a critical role in making a global impact, we want to talk to you. What Youll Do As a Senior ASIC Design Engineer, you will be responsible for building and verifying the Persimmons Chiplet that will run the smallest to largest AI models.... 
    Full time
    Flexible hours

    Persimmons, Inc.

    San Jose, CA
    4 days ago
  •  ...A leading automotive manufacturer in Palo Alto is seeking a Senior Drive Unit Design Engineer to design and develop next-generation electric vehicle drivetrains. The ideal candidate has a bachelor's degree and at least 5 years of experience in electric vehicle component... 
    Full time

    Ford Motor Company

    Palo Alto, CA
    4 days ago
  •  ...career. THE ROLE We are looking for a selfmotivated senior design engineer to be part of a leading team to drive and improve AMDs...  ...designing digital components for high performance, low power SOC/FPGA. Design of digital circuits and components using Verilog/System... 
    Full time

    CareerArc

    San Jose, CA
    4 days ago
  •  ...A leading semiconductor company is seeking a self-motivated Senior Design Engineer to focus on RTL design and validation of high-speed interfaces. The ideal candidate will have strong skills in digital design, Verilog/System Verilog, and collaboration with verification... 
    Full time

    AMD

    San Jose, CA
    4 days ago
  • $200k - $230k

     ...Senior ASIC Design Engineer Location: On Site - San Jose, California, United States Base pay range: $200,000.00/yr - $230,000.00/yr Skills: ASIC Design, SystemVerilog, High Performance Compute, High-Speed Data Transport, PCIe/HBM About the Technology Company... 
    Full time

    Talently

    San Jose, CA
    4 days ago