Sign up to access all features of our service.
  • Job search
  • Favorites
  • Create a CV
    New
  • Salaries
  • Subscriptions

ASIC Design Engineer, Pixel IP for AI/ML Acceleration

Apple Inc.

Apple Inc. in Sunnyvale seeks an experienced ANE design/integration engineer to advance RTL designs for high-speed subsystems within the Pixel IP ANE team. You will collaborate with architecture, verification, power, and physical design groups to ensure robust performance and testability across Apple Neural Engine projects. The role requires deep knowledge of computer architecture, bus topologies (AMBA), and strong experience in synthesis, timing, and DFT/BIST interfaces. #J-18808-Ljbffr Apple Inc.

Vacancy posted 1 day ago
Similar jobs that could be interesting for youBased on the ASIC Design Engineer, Pixel IP for AI/ML Acceleration in Sunnyvale, CA vacancy
  • $150.4k - $277.6k

     ...Technologies group, you’ll help to design our next-generation Apple Neural Engine. You will work on designs that...  ...future generation of products on AI/ML aspect, that will be used by millions...  ...Description As part of the Pixel IP ANE design and integration engineer... 
    Suggested
    Relocation package

    Apple Inc.

    Sunnyvale, CA
    1 day ago
  • $150.4k - $277.6k

     ...Technologies group, you’ll help design our next-generation, high-...  ...will be at the center of the Pixel IP design effort in pixel processing...  ...Description As a Pixel IP DMA Design Engineer in the Pixel IP team, you will...  ...multimedia IP/SoC front-end ASIC RTL design Tight-knit... 
    Suggested
    Relocation

    Apple Inc.

    Sunnyvale, CA
    1 day ago
  • Apple in Sunnyvale is seeking a seasoned hardware design engineer to contribute to next-generation Pixel IP ANE. You will design RTL for high-speed subsystems and...  ...in EE/CE with 10+ years of hands-on experience in ASIC/SoC design, strong AMBA knowledge, and proficiency... 
    Suggested

    Apple

    Sunnyvale, CA
    2 days ago
  • $216.2k - $394k

     ...ASIC Design Engineering Lead - SoC IP DMA In this highly visible, hands-on role, you will lead a team of engineers...  ..., automation, and strategic use of AI and other emerging tools Be hands-...  ...for high speed networking, AI/ML compute, image and video processing,... 
    Suggested
    Worldwide
    Relocation

    Apple Inc.

    Sunnyvale, CA
    20 hours ago
  • $200k - $290k

     ...Systems builds the world's largest AI chip, 56 times larger than...  ...Role:As a senior front-end design engineer, you will be a key part of the...  ...Chip integration and third-party IP integration.Demonstrated...  ....Experience managing external ASIC vendor through product development... 
    Suggested
    Remote work

    Cerebras Systems

    Sunnyvale, CA
    3 days ago
  • $167k - $275k

     ...foundry providing a unique combination of design, development, and fabrication services...  ...of Role: The PMTS Digital Design Engineer will lead the architecture implementation...  ...heterogeneous computing systems.Experience in AI/ML acceleration, vector processing, or advanced... 
    Full time
    Local area

    Globalfoundries

    Santa Clara, CA
    3 days ago
  • $175k - $215k

     ...ASIC Design Verification Engineer Waymo is an autonomous driving technology company...  ...third-party Verification IP (VIP) to accelerate the development cycle...  ...validation Domain expertise in ML accelerators, high-speed...  ...in leveraging Generative AI and LLMs to accelerate... 
    Full time
    Remote work

    Waymo

    Mountain View, CA
    4 days ago
  • Tensordyne, a Sunnyvale-based AI system solutions company, seeks a Sr ASIC engineer to lead microarchitecture and RTL implementation for high‑performance AI accelerators. You will collaborate with CPU/IP teams, drive timing closure, power optimization, and silicon validation... 

    Tensordyne

    Sunnyvale, CA
    1 day ago
  • $167k - $275k

     ...unique combination of design, development, and fabrication...  ...processor and SoC IP solutions. This role...  ...of digital design engineers, driving architecture...  ...subsystems, SoC integration, ASIC design flow, Synthesis...  ...multicore processors, AI accelerators, or high-performance... 
    Local area

    MIPS Holding Inc

    Santa Clara, CA
    3 days ago
  • $163k - $236k

     ...verification of complex digital design blocks by...  ...interacting with design engineers to identify important...  .../UVM for ASICs.Preferred qualifications...  ...verifying interconnect IPs.In this role, you’ll...  ...shape the future of AI/ML hardware acceleration. You will have an opportunity... 
    Worldwide

    Google

    Sunnyvale, CA
    3 days ago
  • $163k - $236k

    Contribute to design power modeling and drive convergence to...  ...Bachelor's degree in Electrical Engineering, Computer Engineering,...  ...work to shape the future of AI/ML hardware acceleration. You will have an opportunity...  ...and tradeoffs.As an ASIC Design Engineer, you will be... 
    Worldwide

    Google

    Sunnyvale, CA
    3 days ago
  • $176.6k - $247.3k

     ...-Scale Machine Learning Acceleration team you’ll be responsible for the design and optimization of hardware...  .... We’re looking for an ASIC Design Eengineer to help...  ...an ASIC Design Engineer, you will:• Develop and...  ...multiple levels of logic from IP blocks to SoCs to full system... 
    Local area
    Work from home
    Flexible hours

    Amazon

    Cupertino, CA
    2 days ago
  • $168k - $264.5k

    NVIDIA is seeking ASIC Design Engineers with experience in agentic AI to help design and implement the world's leading SoC's and GPU's. As part of NVIDIA's "AI for chip design" team, you will have the opportunity to tap into the unlimited potential of AI and change the... 
    Full time
    Work experience placement

    Nvidia

    Santa Clara, CA
    2 days ago
  • $163k - $236k

    Participate in the physical design of complex blocks....  ...Bachelor's degree in Electrical Engineering, Computer Engineering, Computer...  ...to shape the future of AI/ML hardware acceleration. You will have an opportunity...  ...AI/ML-driven systems.As an ASIC Physical Design Engineer, you... 
    Worldwide

    Google

    Sunnyvale, CA
    3 days ago
  • $184.7k - $324.8k

     ...Hardware Technologies group, you’ll help design our next-generation, high-performance,...  ..., you will be at the center of the Pixel IP design effort to capture and display beautiful...  ...quickly. Description As an ASIC Design Engineer in the Pixel IP design team, you be... 
    Relocation

    Apple Inc.

    Sunnyvale, CA
    1 day ago
  • $250.6k - $362.6k

     ...hardware platforms central to the AI era, powering Cisco’s core...  ...product development—from design to qualification to...  ...QualificationsBachelor’s degree in Engineering and 15+ years of ASIC related experience, Master’...  ...and routing (MLPD / ML-driven PnR), and OpenAI APIs... 
    Full time
    Temporary work
    Local area
    Flexible hours

    CISCO Systems

    San Jose, CA
    5 days ago
  • $186k - $407k

     ...storage solutions that accelerate the transformation of...  ...faster than ever.Principal ASIC Design EngineerAbout the...  ...enable the next era of AI, ML, and advanced...  ...Principal ASIC Design Engineer, you will be the primary...  ...implementation of all digital soft IP blocks — CSR/register... 
    Full time
    For contractors
    Local area
    Immediate start

    Micron

    San Jose, CA
    3 days ago
  • $200k - $350k

     ...We are looking for talented Design Verification Engineers to help verify and deliver...  ...s next generation Physical AI SoC. You will work closely...  ...This role focuses on our AI acceleration units. We are designing custom...  ...an integrated third party IP. Familiarity with... 
    Flexible hours

    Velaura

    Santa Clara, CA
    1 day ago
  • Acceler8 Talent is seeking a Design Verification Engineer in Mountain View, CA, to own verification from planning to functional closure for AI accelerator silicon. The role collaborates with RTL,...  ...drives verification strategies across IP, subsystems, and full-chip... 

    Acceler8 Talent

    Mountain View, CA
    3 days ago
  • $136k - $218.5k

     ...Power Integrity Co-Design Engineer to architect and deliver...  ...ability to apply AI as a force...  ...Design , Power-Arch, ASIC, and platform teams...  ...response, mitigation IP, and codify them so...  ...groundbreaking GPU, CPU, or AI accelerator silicon — Hopper /...  ...equivalents.ML/AI applied to noise... 
    Full time
    Live in

    Nvidia

    Santa Clara, CA
    4 days ago
  • $183k - $247.6k

    Our Machine Learning Acceleration (MLA) team develops the...  ...to power today’s AI workloads in datacenters...  ...seeking experienced Design Verification Engineers to build the next generation...  ...Integrate 3rd party IPs and VIPs into the SOC...  ...complex CPU, GPU, or ML accelerator... 
    Local area
    Work from home
    Flexible hours

    Amazon

    Cupertino, CA
    1 day ago
  • $213k - $287.5k

    Annapurna Labs designs silicon and software that accelerates innovation. Customers choose us to create cloud solutions...  .... We’re looking for an ASIC Design Eengineer to help us trail-...  ...help our team members develop your engineering expertise so you feel empowered to... 
    Local area
    Flexible hours

    Amazon

    Cupertino, CA
    5 days ago
  • $163k - $236k

     ...control subsystem's design microarchitecture specifications...  ...implement logic for ASIC products according to...  ...degree in Electrical Engineering, Computer Engineering...  ...shape the future of AI/ML hardware acceleration. You will have an...  ...Property (IP) with the focus on management... 
    Worldwide

    Google

    Sunnyvale, CA
    4 days ago
  • $136k - $218.5k

     ...clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible...  ...clocking. The team collaborates with the front design team to understand the clocking...  ...recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a... 
    Full time
    Work experience placement

    Nvidia

    Santa Clara, CA
    5 days ago
  • $150k - $250k

    Job Title: Senior ASIC Design EngineerJob Location: Santa Clara, CA...  ...Ethernet / High-Speed I/O, AI Accelerator, Memory Subsystem DesignPosition...  ...skilled Senior ASIC Design Engineer to lead the design and...  ...compliance with standards.Engage in IP design and integration,... 

    CyberCoders

    Santa Clara, CA
    3 days ago
  • $100k

     ...industry on cutting-edge AI technology,...  ...talented Physical Design Engineer to implement high-...  ...leading CPU and AI/ML architectures. You...  ...expertise in SOC/ASIC physical design and...  ...cutting-edge AI accelerators, high-performance...  ...architecture and IP teams.Direct impact... 
    Permanent employment

    Tenstorrent

    Santa Clara, CA
    4 days ago
  •  ...build great products that accelerate next-generation computing experiences—from AI and data centers, to...  ...will contribute to the ASIC (chip) design for high-performance network...  ...with the architecture, IP design, Physical Design teams, and product engineers to achieve first pass... 
    Night shift

    AMD

    Santa Clara, CA
    1 day ago
  • $116k - $189.75k

     ...computer graphics, PC gaming, and accelerated computing for more than 25...  ...the unlimited potential of AI to define the next era of...  ...excellence guide us. As an ASIC Design Engineer, you will build powerful SoC...  ...Working on a diverse list of IPs, including GPU's time distribution... 
    Full time
    Work experience placement

    Nvidia

    Santa Clara, CA
    5 days ago
  • $168k - $264.5k

     ...are now looking for a Senior ASIC Design Engineer to join our DFT team! Make...  ..., and verification of DFT IPs for our next-generation SoC...  ...existing vacancy. NVIDIA uses AI tools in its recruiting...  ...by law. NVIDIA pioneered accelerated computing. Today, our AI infrastructure... 

    NVIDIA Corporation

    Santa Clara, CA
    1 day ago
  • $156.4k - $253k

     ...Inclusion. We weave AI into the fabric of...  ...the Role Join our ASIC team and help...  ...You will own module design from specification...  ...and physical‑design engineers to hit aggressive performance...  ...complex IP blocks for high‑speed...  ...with search‑algorithm accelerators. Formal‑... 
    Full time
    Work at office

    Palo Alto Networks, Inc.

    Santa Clara, CA
    4 days ago

Do you want to receive more vacancies?

Subscribe and receive similar vacancies to ASIC Design Engineer, Pixel IP for AI/ML Acceleration. Be the first to apply!