FPGA Verification Engineer | UVM/SystemVerilog Expert
Allps GmbH
A leading engineering company is seeking a highly skilled FPGA Verification Engineer in Santa Clara, CA. You will verify complex FPGA designs, collaborating closely with design engineers and ensuring product quality. The ideal candidate will have over 8 years of experience in FPGA and strong proficiency in UVM and SystemVerilog. This is a full-time onsite role, requiring a Bachelor's or Master's degree in Electrical or Computer Engineering. Competitive rate offered with 5 days onsite per week. #J-18808-Ljbffr
Vacancy posted 23 hours ago
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