Wireless PHY Verification Engineer UVM & DSP Expert
$126.8k - $220.9kApple Oakbrook
A leading technology company in Sunnyvale, California seeks a Wireless PHY Design Verification Engineer to develop and implement advanced verification strategies for WiFi SoCs. The role demands sophisticated test environments and strong experience in wireless and DSP systems. Successful candidates will be responsible for ensuring silicon success through comprehensive methodologies. Compensation includes a competitive salary range of $126,800 to $220,900, comprehensive benefits, and opportunities for stock options. #J-18808-Ljbffr
$126.8k - $220.9k
...Wireless PHY Design Verification Engineer Join Apple's Wireless Connectivity team developing state-of-the-art WiFi SoCs that... ...silicon. Responsibilities Develop sophisticated UVM environments and bus functional models for complex DSP subsystems and IEEE 802.11 protocol. Own...SuggestedWorldwideRelocation- ...A leading engineering company is seeking a highly skilled FPGA Verification Engineer in Santa Clara, CA. You will verify complex FPGA designs, collaborating closely... ...years of experience in FPGA and strong proficiency in UVM and SystemVerilog. This is a full-time onsite role...SuggestedFull time
$181.1k - $318.4k
...world.” The brand new, Apple designed Wireless/Bluetooth chips are at the heart of Networking... ..., craft highly reusable best-in-class UVM Testbenches, implement effective... ...chip SOC debug architecture. As a Design Verification Engineer on our team, you\'ll be at the center of...SuggestedRelocationNight shift$181.1k - $318.4k
...A leading technology company in Sunnyvale seeks a Wireless Systems Design Validation Engineer to develop test methodologies and validate cutting-edge wireless systems. Candidates need a BS with 10 years of experience, strong knowledge of wireless communication, and programming...Suggested$126.8k - $220.9k
...Join Apple's Wireless Connectivity team developing state‑of‑the‑art WiFi SoCs that power... ...production. As a Wireless Design Verification Engineer, you'll ensure first‑time‑right silicon... ...feature closure. Develop comprehensive UVM testbench environments and BFMs spanning...SuggestedWorldwideRelocation$126.8k - $220.9k
...Apple Inc. is looking for a skilled engineer to develop signal processing designs for wireless communication SoCs. In this role... ...for RTL coding, design verification, and support in silicon bringup... ...Bachelor’s degree, understanding of DSP fundamentals, and proficiency in...$126.8k - $220.9k
...Wireless RF OTA Connectivity Validation Engineer At Apple, we work every single day to craft products that enrich people's lives. Do you love working on... ...in Electrical Engineering (MSEE). Understanding of PHY Layer and MAC/application layer protocols. Proficiency...Work experience placementRelocation$120k - $192k
...cloud computing AI engines, supercomputers, networking... ...power and advanced wireless solutions.... ...Develop and execute verification plans for IP blocks... ...maintain System Verilog/UVM‑based verification... ...C. Knowledge of PHY layers and... ...network protocols, or DSP design. Experience...Local area- ...inspire millions of Apple’s customers every day! Apple’s Wireless System and Compliance Engineering team is looking for an engineer to work on radiated... ...in Electrical Engineering (MSEE). Understanding of PHY Layer and MAC/application layer protocols. Proficiency...Work experience placement
$170.7k - $300.2k
A leading tech company is seeking a Wireless Systems Validation Engineer in Cupertino, United States to contribute to the development of Apple Vision Pro... ...at least 6 years of relevant experience, expertise in Phy/Mac design for WiFi, and proficiency in Matlab, Python, or...$126.8k - $220.9k
A leading technology company in Sunnyvale is looking for a Wireless Design Verification Engineer to develop state-of-the-art WiFi SoCs. You will ensure silicon success through sophisticated testbenches and work with cross-functional teams. Ideal candidates will have a Bachelor...- ...An established industry player is seeking a skilled verification engineer with extensive experience in UVM and SystemVerilog. This role involves defining and implementing a comprehensive verification environment, writing test plans, and debugging RTL and gate-level netlists...
$152k - $287.5k
...NVIDIA Gruppe is seeking a highly motivated Firmware Engineer to develop software for PHY and SERDES devices within their Networking organization. You will be responsible for the integration, testing, and validation of firmware, contributing to cutting-edge AI and high...$152k - $241.5k
...for a creative, highly motivated Firmware Engineer to join the NVLink team within our... ...will develop software for next-generation PHY, SERDES and link-level devices, driving... ...seamless execution from design to final verification. Own, define, develop, and maintain robust...- ...View is seeking an experienced validation engineer to develop custom silicon solutions that... ...role involves planning and executing verification activities, ensuring design accuracy while... ...possess significant experience with UVM and SystemVerilog, complemented by advanced...
$170.7k - $300.2k
Wireless Systems Validation Engineer - Apple Vision Pro Cupertino, United States | Posted on 09/06/2023 Apple is looking for a Wireless Systems Validation... ...experience. The role involves in-depth knowledge of Phy/Mac design for WiFi, BT, or Cellular systems and hands-on...$181.1k - $318.4k
...what’s considered feasible? As part of our Wireless Hardware group, you’ll be responsible for... ...we ensure cutting‑edge wireless and PHY systems meet rigorous performance standards... ...is an opportunity to work with talented engineers on complex technical challenges that shape...Relocation$138k - $198k
Google Inc. is seeking a Verification Engineer in Mountain View, CA. In this role, you’ll verify complex digital design blocks, utilizing SystemVerilog and UVM to enhance verification environments and ensure functionally correct designs. The qualified candidate will have...- A leading technology firm seeks a skilled FPGA Verification Engineer in Mountain View. This role involves verifying FPGA designs with advanced methodologies and requires strong expertise in SystemVerilog, UVM, and debugging skills. The ideal candidate will develop verification...
- A technology solutions company in California is seeking a Verification Engineer to write SystemVerilog/UVM testbenches for ASICs and FPGAs. The ideal candidate will have a Bachelor’s degree in a related field and experience with ASIC/FPGA verification. Familiarity with...
- ...Apple Inc. is looking for a Wireless RF OTA Connectivity Validation Engineer in Santa Clara, California. This role involves validating wireless performance across various connectivity technologies for Apple products, translating carrier and regulatory requirements into...
$145k - $286k
1000 Micron Technology, Inc. is hiring a Staff ASIC Design Verification Engineer in San Jose, California. The role involves defining and improving... ...in verification, with strong skills in SystemVerilog and UVM methodology. The compensation ranges from $145,000 to $286,00...- ...A leading technology company in Santa Clara is looking for a Design Verification Engineer to ensure the functionality and performance of their SOCs. The role involves developing test plans, collaborating with design teams, and verifying various hardware components. The...
- ...A leading technology company is seeking a Senior Verification Engineer to join their multi-media IP team. The ideal candidate will have at least 5 years of design verification experience, particularly in verifying sophisticated IPs using System Verilog. Responsibilities...
$147.4k - $272.1k
...Wireless Validation Engineer - Stability, Wireless Technologies & Ecosystems Are you a fearless thinker? Do you love the challenge of advancing a widely accepted technology? In the Wireless Software group, you'll be responsible for bringing groundbreaking wireless...Relocation- ...Apply advanced verification methodologies to verify memory subsystem designs... ...and the interfaces with DDR PHY. Interact with design and... ...functional test plans; build UVM‑based constrained random test... ...Master’s degree in Electrical Engineering and four years of experience...
- ...responsibilities related to DFT tools. You will work with the Siemens suite for DFT insertion, MBIST Repair Implementation, and verification of features like Boundary Scan and JTAG. The role requires expertise in the IJTAG 1688 standard and an understanding of ICL and...
- Apple Inc. in Cupertino, California, is seeking a Wireless RF OTA Connectivity Validation Engineer to validate wireless performance across its product portfolio. This role involves hands-on validation and certification testing, working with cross-functional teams to ensure...
- ...Texas Instruments is seeking a Design Verification Engineer in Santa Clara, California. The role involves confirming the accuracy of analog and mixed signal designs, working independently with product development teams, and analyzing equipment to establish operating data...
- ...talented and detail-oriented ASIC Design Verification (DV) Engineer to join our chip design team. You'll... ...scratch using advanced methodologies like UVM (Universal Verification Methodology).... ...understanding. Exposure to physical layer (PHY) or mixed-signal verification concepts....
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