Senior DFT Engineer - ASIC/SoC Test & Yield Excellence
The Consensus
Etched is seeking a highly skilled Design For Testability (DFT) Engineer to ensure robust testability of ICs from design to production. You will develop DFT architectures, integrate scan, boundary scan, BIST, MBIST, and work with design/verification teams to improve coverage and reliability.
The role spans post-silicon support and ATE program optimization. Expect extensive hands-on work with SystemVerilog, EDA tools, and scripting to drive testability across multiple product generations in a
#J-18808-LjbffrVacancy posted 15 hours ago
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