Senior RTL Networking ASIC Engineer: QoS & Latency
$210k - $275kEridu Corporation
Eridu Corporation, a Silicon Valley hardware startup, seeks seasoned RTL designers to shape and implement Networking ASICs. You will specify, architect, and productize high‑speed chips for Ethernet/IP interconnects, focusing on latency and QoS. Join a world‑class engineering team advancing AI data centers and hardware infrastructure. We offer a competitive base salary for SF Bay Area, with a pay range of 210,000–275,000 USD per year, aligned to skills and market trends. #J-18808-Ljbffr
Vacancy posted 4 days ago
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