Senior SOC Timing & Clock Network Engineer
$164.47k - $311.89kIntel Corporation
Intel Corporation is looking for a Physical Design Timing Engineer to enhance the performance and efficiency of their System-on-Chip (SoC) designs. This role involves conducting SOC level timing analysis, optimizing designs, and developing methodologies for high-performance solutions. The ideal candidate will have substantial experience in static timing analysis and clock network design, showcasing innovative problem-solving capabilities. Competitive compensation includes an annual salary range of $164,470 - $311,890. #J-18808-Ljbffr Intel Corporation
Vacancy posted 1 day ago
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