Senior ASIC Design Manager — Power & IP Leader
Apple Inc.
Apple Inc. is seeking an ASIC Design Manager in Cupertino to lead a skilled team through SOC design, power management, and IP integration. This role emphasizes coordinating engineers, guiding microarchitectures, and ensuring high-quality design delivery for complex silicon systems. The position requires a BS in engineering with at least 10 years of industry experience, plus strong leadership and collaboration skills across internal groups. #J-18808-Ljbffr Apple Inc.
- ...the center of Apples SOC IP DMA design effort. Balancing equal parts people management and technical... ...worldwide. As a hands-on ASIC Design Engineering Lead... ...generate effort area and power estimates and create bottoms... ...a plus Required Experience: Senior IC...SuggestedFull timeWorldwide
$167k - $275k
...providing a unique combination of design, development, and fabrication... ...and give customers the power to shape their markets. For more... ..., visit of Role:The Senior Manager / Deputy Director, Processor... ...generation processor and SoC IP solutions. This role provides...SeniorFull timeLocal area- Apple Inc. in Sunnyvale is seeking an experienced ASIC Design Engineering Lead to head a team central to the SoC IP DMA design effort. The role blends people management with strong technical leadership across micro-architecture, RTL delivery, and debug to ensure silicon...Senior
- SiFive is seeking a senior power analysis engineer to develop and deploy methodologies for measuring and analyzing IP power consumption. You will correlate models with RTL and silicon... ...and modeling, plus experience in ASIC power analysis and HW/SW development. Strong...Senior
- NVIDIA Corporation is seeking a Senior Digital Design Manager to lead a high-performance mixed-signal/ digital design group in Santa Clara. You will drive teams developing cutting-edge SerDes IPs and SoCs, focusing on PPA optimization and robust verification. The role demands...Senior
$192k - $278k
Lead the physical design implementation and strategy for... ...-complexity subchips.Manage the full design cycle from... ...electrical performance, and power integrity.Partner with... ...with external EDA and IP vendors to improve flows... ...closure for high-speed ASICs across various process nodes...Worldwide$232k - $368k
...a lasting impact on the world.Silicon Co-Design Group (SCG) is a wide-ranging, multi-functional... ...! We are seeking an experienced Senior Manager to lead Product Co-Design and Verification in areas of Speed, Reliability and Power Compliance. You will oversee speed/timing...SeniorFull timeShift work$136k - $218.5k
The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is... ...clocking. The team collaborates with the front design team to understand the clocking... ...architectural/design/physical constraints.Improve Power, Performance, and Area (PPA) of innovative...SeniorFull timeWork experience placement$136k - $218.5k
We are now looking for a Senior ASIC Power Engineer!NVIDIA is seeking extraordinary power engineers to design hardware accelerators and processors on our next-generation mobile, embedded and datacenter platforms. This position offers the opportunity to have real impact...SeniorFull time$206.2k - $356.4k
...searching for a dedicated engineering manager to join our exciting team of... ...solvers. Description As an ASIC Design Manager, your responsibilities... ...Help architect solutions for power management of the SOC and... ...management and other SOC level IPs- Plan and work on Integration...Relocation- Synopsys Inc. seeks a senior Subsystem Architect to define architectures for memory controllers... ..., and compute blocks, integrating IP blocks into validated subsystems. You will... ...5G, and IoT applications, mentoring teams and shaping power, #J-18808-Ljbffr Synopsys IncSenior
$192k - $278k
...experience in physical design, including leading full... ...closure for high-speed ASICs across various process... ...leadership experience managing execution schedules, mitigating... ...of performance, power, and area trade-offs, alongside... ...with external EDA and IP vendors to improve...Worldwide- ...GlobalFoundries is seeking a Senior Manager/Deputy Director, Processor Design, to lead the design and delivery of next-gen processor IP and SoC solutions. You will drive architecture, RTL development, integration and silicon execution while coordinating with architecture...Senior
$192k - $278k
...subsystems, working with cross-functional design, architecture and power teams to achieve architectural... ...UVM.3 years of experience in people management.Preferred qualifications:Master's degree... ...integration within AI/ML-driven systems. As an ASIC Design Verification Manager for...Worldwide$192k - $278k
Lead the physical design implementation and strategy for... ...phases and team needs.Manage the full design cycle from... ...performance, and power integrity.Partner with internal... ...with external EDA and IP vendors to improve flows... ...closure for high-speed ASICs across various process nodes...Worldwide$186.9k - $267.7k
...complex and high-performance Silicon ASICs. Our silicon devices drive the... ...networks and carry over 90% of IP traffic. Cisco Silicon One is... ...aspects of advanced IC package design and heterogeneous system... ...a highly qualified Signal and Power Integrity Technical Lead to help...Full timeTemporary workLocal areaRemote workFlexible hours$136k - $218.5k
...looking for a motivated ASIC Timing Engineer to... ...drive timing and power convergence as well... ...generation and management.Expertise in analysis... ...Experience in physical design and optimization e.... ...in AMS designs/IPs.Experience in methodology... ...to be the leader of AI computing, and...SeniorFull time- ...in Santa Clara, CA, seeks a Senior Digital Design Engineer for its NVLink Fusion... ...to deliver high-performance, power-efficient designs. The role emphasizes... ...RTL, trade-off analysis, and IP integration. A bachelor's or... ...CE with 5+ years of relevant ASIC experience and experience...Senior
- Google is shaping the future of AI/ML hardware acceleration through TPU power design, delivering efficient, scalable silicon for world‑class AI workloads. You will drive power modeling, implement novel optimization techniques, and contribute to RTL low‑power practices...Senior
$136k - $218.5k
The SCG Architecture team is hiring a Senior Power Integrity Co-Design Engineer to architect and deliver di/dt... ..., Circuit Design , Power-Arch, ASIC, and platform teams. You're the connective... ...transient sense, droop response, mitigation IP, and codify them so every future...SeniorFull timeLive in$232k - $368k
...imagination and intelligence.We are seeking an ASIC Chip Manager to help drive development of future SoC... ...well as coordinate the activities of IP design, integration, DFT, physical design,... ...including micro-architecture, low-power design, RTL coding, verification, and emulationBack...SeniorFull time$168k - $264.5k
We are now looking for a Senior ASIC Design Engineer to join our DFT team!NVIDIA has continuously reinvented... ...implementation, and verification of DFT IPs for our next-generation SoC products.... ...as clocking, STA, place & route, and power optimizationExperience in post-silicon...SeniorFull time- ...Integration Engineer to join the Advanced Technology Group. You will lead RTL integration of IPs into complex ASIC/SoC designs, owning clocking, reset, address mapping, and power domain integration while ensuring design quality and verification readiness. Collaborate...Senior
- ...seeking an experienced Static Timing Analysis (STA) leader to shape the timing closure for high-performance ASICs and TPU integration. You will drive timing constraints, margins, and ECOs across large compute designs and collaborate with RTL, DFT, and architecture teams...Senior
$192k - $278k
...verification team for portions of TPU designs, setting and communicating... ...of experience in people management.Preferred qualifications:... ...Processing Unit) technology that powers Google's most demanding AI/ML... ...AI/ML-driven systems. As an ASIC Design Verification Manager for...Worldwide$163k - $236k
...verification of complex digital design blocks by understanding the... ...RTL using SystemVerilog/UVM for ASICs.Preferred qualifications:... ...cycles and verifying interconnect IPs.In this role, you’ll work to shape... ...Unit) technology that powers Google's most demanding AI/ML...SeniorWorldwide- Eridu is seeking a hands-on ASIC Design Verification Lead to own verification strategy, infrastructure... ...high-performance networking silicon. This senior role requires deep expertise and practical hands-on work beyond management in a fast-moving startup. You will define verification...Senior
$168k - $264.5k
We are now looking for a Senior ASIC Design Engineer.NVIDIA is seeking ASIC Design Engineers to implement... ...and deliver high performance, area and power efficient RTL to achieve design targets... ...your tasks.Work on a broad list of IPs such as GPU's work scheduler, time distribution...SeniorFull timeWork experience placement$166.3k - $314.2k
...foundry providing a unique combination of design, development, and fabrication services to... ...transform industries and give customers the power to shape their markets. For more... ...requirements for new technology features and design IPs, including MRDs for motor control, power...Full timeLocal area- ...we believe technology has the power to solve the world’s most important... ...the future. Whether you’re designing next-gen processors, enabling... ...seeks a candidate who will be managing the Memory I/O design team... ...implementation of future LPDDR IPs. The focus of the activity will...Senior
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