Sign up to access all features of our service.
  • Job search
  • Favorites
  • Create a CV
    New
  • Salaries
  • Subscriptions

Senior SoC Physical Design Lead (RTL-to-GDSII)

NXP Semiconductors NV

NXP Semiconductors NV in Austin, TX seeks an experienced Digital Designer for SoC implementation and physical design. You will own end-to-end PD execution from RTL to silicon for advanced technology nodes and drive delivery to meet PPA targets. The role emphasizes leadership, cross-functional collaboration with RTL, verification, and architecture teams, plus adoption of advanced node tech and automation. Strong ASIC/SoC PD background and Cadence/Synopsys tool proficiency are essential. #J-18808-Ljbffr NXP Semiconductors NV

Vacancy posted 4 days ago
Similar jobs that could be interesting for youBased on the Senior SoC Physical Design Lead (RTL-to-GDSII) in Austin, TX vacancy
  • Apple Inc. in Austin, TX seeks a seasoned SoC Physical Design Engineer to lead PD efforts for high-performance, low-power designs. You will drive RTL-to-GDSII implementation, PnR, STA, and sign-off, while guiding design rules and methodologies with cross-functional teams... 
    Senior

    Apple Inc.

    Austin, TX
    1 day ago
  • Cadence Solutions (North America) seeks an experienced Front End Design leader to guide RTL design projects in the semiconductor space. You will mentor a team of RTL engineers and drive features that meet performance, power, and area goals. You will work with DV, PD, architecture... 
    Senior

    Cadence

    Austin, TX
    1 day ago
  • NVIDIA in Austin, TX seeks a Senior CPU Design Engineer to design and implement high-performance CPU subsystems, collaborating closely with architects, verification, and physical design teams. You will work on RTL in Verilog/SystemVerilog, optimize for timing and power... 
    Senior

    NVIDIA

    Austin, TX
    5 days ago
  •  ...Technology Group is seeking a Full-Chip RTL Integration Engineer to join...  ...team in Austin. You will lead RTL integration of multiple IPs into complex ASIC/SoC designs, owning clocking, reset architecture...  ...Design, Verification, DFT and Physical Design to drive system-level... 
    Senior

    NVIDIA

    Austin, TX
    3 days ago
  • Cisco Systems, Inc in Austin seeks a Senior Physical Design engineer to lead fullchip floorplanning and RTL-to-GDSII flows for 7nm/5nm processes. You will collaborate with RTL, DFT, implementation, EDA vendors, and tool teams to optimize performance, power integrity, and... 
    Suggested

    Cisco Systems, Inc

    Austin, TX
    2 days ago
  • Dell Technologies seeks an experienced FPGA Engineer to lead the full development lifecycle from concept through production. You will define architectures, perform RTL design, and ensure timing, synthesis, and validation meet stringent quality and schedule requirements... 
    Senior

    Dell Technologies

    Round Rock, TX
    1 day ago
  • Apple Inc. is seeking a Physical Design Lead in Austin, Texas to oversee and enhance the Physical Design process for innovative silicon products. Candidates should have extensive experience in physical design with an understanding of digital design concepts, along with... 
    Senior

    Apple Inc.

    Austin, TX
    2 days ago
  • Physical Design Lead - Custom Silicon Management We are looking for a remarkable Physical Design Lead...  ...-end design methodology including basic RTL coding, synthesis methodology, timing constraints...  ..., matching pair, etc. Mixed signal SoC tapeouts involving multiple instances of... 

    Apple Inc.

    Austin, TX
    2 days ago
  •  ...Computer in San Francisco (also listed for Bay Area, Pittsburgh, PA and Austin, TX) seeks a senior RTL design engineer to own block level design, integration and sign-off for complex SoC components. You should bring strong Verilog or SystemVerilog, timing closure and low‑... 
    Senior

    present of AI

    Austin, TX
    1 day ago
  • Physical Design Engineer - Timing Lead | Startup | Austin A growing startup building custom accelerators is looking...  ...development across advanced ASIC and SoC designs. This is a high-impact...  ...performance, and area (PPA). Collaborate with RTL, DFT, and physical design teams to... 

    Oho Group

    Austin, TX
    2 days ago
  •  ...Electronics (eInfochips) is seeking a Physcial Design Engineer to execute synthesis, PNR, and STA...  ...partitions, coordinating with architects and RTL/DFT teams to meet tight schedules. The role requires 7+ years in physical design, proficiency with Innovus/Tempus/Quantus... 
    Senior

    Arrow Electronics

    Austin, TX
    1 day ago
  •  ...cross-functional teams span design, research, development,...  ...for a Principal RTL Engineer to own pre-tapeout...  ...tapeout quality for digital SoC modules on our MCU...  ...debug, collaborate with physical design to hit timing and...  ...impact of and help plan and lead the implementations and... 
    For contractors
    Local area
    Relocation

    Ambiq Micro, Inc.

    Austin, TX
    1 day ago
  • SPACE EXPLORATION TECHNOLOGIES CORP in Austin, TX is seeking a Sr. SOC/ASIC Physical Design Engineer to work on next-generation silicon for space and ground infrastructures. The ideal candidate should have 5+ years of experience in ASIC and physical design flow development... 
    Senior

    SPACE EXPLORATION TECHNOLOGIES CORP

    Austin, TX
    1 day ago
  • SpaceX is looking for a motivated SR. SOC/ASIC PHYSICAL DESIGN ENGINEER in Austin, Texas. Your role involves developing cutting-edge silicon for Starlink, collaborating with cross-disciplinary teams, and driving implementation of advanced physical design methodologies.... 
    Senior

    SpaceX

    Austin, TX
    1 day ago
  • Cadence is seeking a Senior Physical Design Architect/Chip Lead within the Performance Solutions Group (PSG) to drive RTL-to-GDS services for data centers, AI, and automotive markets. You will lead a team, engage directly with customers, and own technical decisions to... 
    Senior

    Cadence

    Austin, TX
    2 days ago
  • ## Principal Physical Design Engineer / Physical Design...  ...Designer for **SoC Implementation / Physical...  ...delivery from RTL to silicon for cutting...  ...Ownership*** Lead Physical design execution...  ....* Interface with senior leadership for status...  ...*** Full RTL-to-GDSII implementation flow... 
    Full time
    Work at office

    NXP Semiconductors

    Austin, TX
    2 days ago
  • $186.9k - $267.7k

     .... Because full product development—from design to qualification to production—is within...  ...Fullchip clock mesh and Flex-HTree methods RTL-to-GDSII implementation: Floorplan, Power Grid...  ...static timing analysis, power integrity, physical verification and equivalence checks with... 
    Full time
    Temporary work
    Local area
    Flexible hours

    Cisco

    Austin, TX
    2 days ago
  • Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering) Austin, TX SpaceX was founded under the belief that a future where humanity is exploring...  ...develop timing, power, and area design targets, and explore RTL/design tradeoffs. Resolve design, timing, congestion, and... 
    Senior
    Permanent employment
    Worldwide
    Weekend work

    SPACE EXPLORATION TECHNOLOGIES CORP

    Austin, TX
    1 day ago
  • $106.5k - $162k

    Overview of Role As a Sr. Physical Design Engineer, you will be responsible for the entire APR implementation flow from RTL-to-GDS that includes synthesis, floorplan, place and route...  ...to pushing the envelope for the world’s leading semiconductor company. We are currently... 
    Senior
    Work at office

    TSMC - Taiwan Semiconductor Manufacturing Company Limited

    Austin, TX
    1 day ago
  • Broadcom Inc. is seeking an experienced design engineer to join the Central Engineering Group for memory subsystem development. You will design memory blocks, implement RTL, and drive timing and physical design closure. The role requires strong Verilog, RTL, place-and-route... 

    Broadcom Inc.

    Austin, TX
    4 days ago
  • Synopsys seeks a hands-on DFT expert to lead test architecture for complex SoCs that tape out and go production. You will own end-to-end DFT deliverables, collaborating across RTL, verification, physical design, and timing to optimize testability, yield, and cost. This... 
    Senior

    Synopsys Inc

    Austin, TX
    2 days ago
  • Renesas Electronics Corp. is seeking an experienced Digital Design Lead in Texas to develop, verify, and mentor teams in pre- and post-silicon environments for advanced digital power management ICs. You will lead design blocks, write tests, and improve design automation... 
    Senior

    Renesas Electronics Corp.

    Austin, TX
    1 day ago
  •  ...Semiconductors NV in Austin seeks a Static Timing Design Manager to lead a team of engineers focused on STA for MPU SoCs. You will develop, implement and verify timing...  ...subsystem and full-chip levels, and collaborate with RTL/IP teams to fix timing issues in AI, Edge and... 
    Senior

    NXP Semiconductors NV

    Austin, TX
    2 days ago
  • NVIDIA is seeking an experienced ASIC Design Engineer in Austin, Texas to design and implement advanced SoCs and GPUs. The role involves leveraging AI technologies to drive innovation in chip design for various industries, including consumer graphics and AI applications... 
    Senior

    NVIDIA

    Austin, TX
    2 days ago
  • Amazon Leo is seeking a senior ASIC physical design engineer to help define and implement SOCs for satellites and gateways. You will collaborate with RTL/Arch teams to drive feasibility studies, tradeoffs, and power-performance analyses for physical design closure. Qualified... 
    Senior

    Amazon Kuiper Manufacturing Enterprises LLC

    Austin, TX
    4 days ago
  •  ...Electronics America, Inc. in Austin, TX, is seeking a Senior Staff GPU Physical Design Engineer to shape full-chip and block-level...  ...PPA targets across advanced-node GPUs and SoCs. You’ll collaborate with architecture, RTL, design technology, software, and external vendors... 
    Senior

    Samsung Semiconductor

    Austin, TX
    2 days ago
  •  ...wall as we approach the physical limits of traditional silicon...  ...: Director of Digital Design FLSA Status : Exempt...  ...-level simulation, SoC integration, interface...  ...verification. Build and lead the verification team,...  ...with system architecture, RTL design, physical design... 
    Full time

    Neurophos

    Austin, TX
    2 days ago
  • Design · San Francisco, Bay Area OR Pittsburgh, PA OR Austin, TX · Senior level A senior RTL design engineer typically owns block level design, integration...  ..., and sign off for complex SoC components. Strong...  ...where mistakes are costly and physical limits are real. How it... 
    Senior
    Work at office

    present of AI

    Austin, TX
    1 day ago
  • $180k - $245k

     ...computing. We are looking for a Senior Design Engineer to design, integrate, and sign off RTL for blocks across our power-efficient SoC: the compute fabric's on-chip interconnect...  ...closely with architects, the design lead, DV, physical design, and firmware to tape out an... 
    Senior
    Night shift

    Efficient Computer

    Austin, TX
    2 days ago
  •  ...cross-functional teams span design, research, development, production...  ...accomplished Director of Physical Design to lead and scale our physical...  ...closely with architecture, RTL design, analog/mixed - signal...  ...integrate mixed - signal IP into SoCs. Collaborate with product... 

    Ambiq Micro, Inc.

    Austin, TX
    20 hours ago

Do you want to receive more vacancies?

Subscribe and receive similar vacancies to Senior SoC Physical Design Lead (RTL-to-GDSII). Be the first to apply!