Senior Physical Design Engineer II, SoC (sub-7nm)
Uncrewed Engineering Jobs
Arrow in San Jose, California is seeking a senior ASIC physical design engineer to execute synthesis, PnR, and STA for assigned partitions of an SoC under strict schedules. You will collaborate with architects, RTL designers, and DFT teams to resolve issues, drive EM/IR, LEC signoffs, and ensure low-power design techniques while refining flow methodologies and addressing flow issues with EDA vendors. You will contribute to the refinement of implementation methodologies, ensuring convergence and
#J-18808-LjbffrVacancy posted 2 days ago
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Advanced Micro Devices , Inc.
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...computing. About the Role Join our Physical Design (SoC Integration) team responsible for... ...to GDS. As a Sr. Staff Physical Design Engineer, you will lead physical implementation... ...SoC designs in advanced process nodes (7nm, 5nm, 3nm) Execute and optimize synthesis...SK Hynix Memory Solutions America Inc.
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