Principal DFT Engineer
$180k - $255kSambaNova
The era of pervasive AI has arrived. In this era, organizations will use generative AI to unlock hidden value in their data, accelerate processes, reduce costs, drive efficiency and innovation to fundamentally transform their businesses and operations at scale. SambaNova Suite™ is the first full-stack, generative AI platform, from chip to model, optimized for enterprise and government organizations. Powered by the intelligent SN40L chip, the SambaNova Suite is a fully integrated platform, delivered on-premises or in the cloud, combined with state-of-the‑art open-source models that can be easily and securely fine‑tuned using customer data for greater accuracy. Once adapted with customer data, customers retain model ownership in perpetuity, so they can turn generative AI into one of their most valuable assets. About The Role Sambanova is looking for a talented and motivated Principal Design for Test (DFT) Engineer to help us build state‑of‑the‑art RDU chips for machine learning and artificial intelligence. We are looking for a highly hands‑on engineer who will be responsible for DFT architecture and implementation, verification, ATPG, MBIST and silicon bring‑up for complex high‑performance chips. Responsibilities Define & implement block-level and SoC-level DFT architecture for large, hierarchical SoCs Develop and maintain ATPG flows for stuck‑at, at‑speed and advanced fault models. Develop scripts and automation for DFT insertion, ATPG, coverage analysis, pattern generation, and debug. Develop and maintain JTAG, IEEE 1500, and IEEE 1687/IJTAG infrastructure for internal test and debug access. Generate production‑quality ATPG and MBIST patterns and support deployment to ATE. Work closely with STA and Physical Design teams on DFT timing closure Support silicon diagnosis, failure localization, yield analysis, and manufacturing test optimization. Required Qualifications B.S. in computer science, computer engineering, or related field 10+ years relevant industry experience Deep understanding of scan insertion, scan compression, ATPG, MBIST, JTAG, and hierarchical DFT Hands‑on experience with Siemens Tessent tool flow (preferred) or equivalent industry standard DFT tools Familiarity with cell‑aware ATPG, small‑delay defects, IEEE 1500, IEEE 1687/IJTAG, and low‑power DFT is highly desirable Strong understanding of advanced ATPG, silicon diagnosis, and failure localization methodologies Experience with STA constraints & analysis for DFT modes & SDF simulations Working knowledge of Verilog/System‑Verilog simulators & waveform debugging Preferred Qualifications Experience with ATE pattern deployment and silicon bring‑up Experience with multi‑die/chiplet DFT, known‑good‑die test, or die‑to‑die interface testing Experience with large compute, AI accelerator, or HPC SoCs Base Salary Range Base Pay Range $180,000—$255,000 USD EEO Policy SambaNova Systems is an Equal Opportunity/Affirmative Action Employer. All qualified applicants will receive consideration for employment without regard basis of age (40 and over), color, disability, gender identity, genetic information, marital status, military or veteran status, national origin/ancestry, race, religion, creed, sex (including pregnancy, childbirth, breastfeeding), sexual orientation, and any other applicable status protected by federal, state, or local laws. Benefits Summary For US-Based, Full-Time Employment Positions SambaNova offers a competitive total rewards package, including the base salary, plus equity and benefits. We cover 95% premium coverage for employee medical insurance, and 77% premium coverage for dependents and offer a Health Savings Account (HSA) with employer contribution. We also offer Dental, Vision, Short/Long term Disability, Basic Life, Voluntary Life, and AD&D insurance plans in addition to Flexible Spending Account (FSA) options like Health Care, Limited Purpose, and Dependent Care. Our library of well‑being benefits available to you and your dependents includes a full subscription to Headspace, Gympass+ membership with access to physical gyms, One Medical membership, counseling services with an Employee Assistance Program, and much more. #J-18808-Ljbffr
$231.1k - $358.2k
...more. For more information, visit . We're looking for a Sr. Principal-level DFT leader to own that foundation. This isn't a role focused on... ...finFET nodes, across multiple ICs.Job Title: Sr. Principal DFT Engineer Job Location: San Jose, CA (This position requires a full-...SuggestedFull timeWork at office- ...Central DFX (CDFX) is a centralized ASIC design organization within AMD Technology and Engineering, with teams across North America and Asia. CDFX develops and standardizes Design-for-Test (DFT) and Design-for-Debug (DFD) architectures, methodologies, implementation flows...Suggested
$150.68k - $225.7k
...ImpactMarvell is seeking a talented senior-level System Diagnostic Engineer to join our Platform Engineering team, supporting board, switch,... ...to define diagnostic requirements and hardware-testability (DFT) hooksMentor junior engineers in developing their diagnostic software...SuggestedPermanent employmentInternshipWork from home$136.88k - $205k
...Your ImpactMarvell is seeking a highly motivated and talented Principal Test Engineer to join our dynamic NPI product engineering team. You will... ...testing (critical skill), test methodology, silicon process, DFT/DFM, and high-speed digital testing experience.Strong...SuggestedPermanent employmentFull timeInternshipWork from home$219k - $351k
...Samsung’s strong R&D focus & lab innovation engine. We work closely with development teams... ...product roadmaps.Come join the team as a Principal Engineer, SOC Integration that is... ...designers on timing constraints, synthesis, DFT insertion, and static timing analysisWhat...SuggestedWork at officeFlexible hours$203.8k - $315.9k
DescriptionJob Title: Principal Engineer, Hardware Design Job Location: San Jose, CA (This position requires a full-time, on-site presence in... ...area targets.Drive block-level synthesis, timing closure, and DFT readiness.Key Requirements:Master's degree in Electrical...Full timeWork at office$102.3k - $209.5k
The Principal Supply Chain Product Engineer is a recognized technical leader responsible for ensuring that products are designed, validated, and manufactured... ...design, and validation processes.Experience with DFM, DFT, DFR, and reliability engineering principles.Familiarity...Temporary workWork at officeFlexible hours$185k - $240k
...Principal / Senior Principal Electrical Design Engineer San Jose, California, United States Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure... ...Drive design-for-excellence initiatives including DFT, DFM, and DFR to systematically improve manufacturability...Contract workFlexible hours- ...Oracle is seeking a Principal Supply Chain Engineer specializing in PCBA Manufacturing Test Engineering to join our Manufacturing and Operations organization... ...deep technical expertise with broad ownership across DFT, test program and fixture development, supplier...Worldwide
$219k - $351k
...Samsung’s strong R&D focus & lab innovation engine. We work closely with development teams... ...roadmaps. Come join the team as a Principal Engineer, SOC Integration that is creating... ...designers on timing constraints, synthesis, DFT insertion, and static timing analysis...Contract workFor contractorsFor subcontractorWork at officeFlexible hours- ...layout strategy, layout review, RF structure review, BOM review, DFM/DFT review, design verification, bring-up, debug, characterization,... ...and lessons-learned across programs.Mentor senior and mid-level engineers; establish hardware design best practices, checklists, libraries...
$205k - $260k
...Discover more at Role Overview Astera Labs is seeking a Senior Principal Test Engineer to serve as a technical authority for test engineering... ...test cost, and time to market while partnering with design, DFT, product engineering, operations, and manufacturing teams in...Flexible hours- ...One of our valued customer is looking for Principal STA Engineer at San Jose, CA Principal STA Engineer San Jose, CA Role Overview We are seeking... ...power. Collaborate closely with RTL, Physical Design, DFT, CTS, and CAD teams to achieve timing convergence. Analyze and...
$182.36k - $273.2k
...chips in TSMC advanced process nodes. We are a global, multi-site engineering organization spanning Santa Clara, Ottawa, Pavia, Irvine,... ...-functional teams including analog design, digital design, DV, DFT, physical design, STA, firmware, validation, ATE/test engineering...Permanent employmentFull timeWork from home$150k - $190k
...Principal Test EngineerPrincipal Test Engineer San Jose, CA | Hybrid (3 days onsite / 2 remote) Base Salary: $150,000–$190,000 (DOE) A leading chip and silicon... ...with design teams to ensure robust test coverage and DFT implementation.Architect and design ATE hardware for...Remote work$100k
...our IP even better. In this role, you will be responsible for DFT implementation using industry standard tools for high-speed CPU... ...Who you areYou have a Bachelor’s, Master’s, or PhD in Electrical Engineering, Computer Engineering, or Computer Science, along with 10+...Permanent employmentRemote workWorldwide- Job-ID33217642Reference26-01963Job SummaryWe are looking for a skilled DFT/ATPG Engineer with 5+ years of hands-on experience in ASIC/SoC design and manufacturing test. The candidate should have strong knowledge of DFT fundamentals, ATPG, scan-based testing, MBIST,...
- Job-ID33277495Reference26-02087 Required Technical Skills: 5+ years of hands-on experience in Design for Test (DFT) and Automatic Test Pattern Generation (ATPG) for SoC or ASIC designs. Strong understanding of DFT fundamentals, including controllability, observability...
- Job description Senior DFT EngineerMoTek Technologies has an immediate opening for a Senior DFT Engineer:The ideal candiate will be responsible for DFT flows and implementation Run RTL, gate, and gate with SDF simulations to confirm correct functionality of DFT logic. Generate...Immediate start
$168k - $264.5k
We are now looking for a Senior DFT Methodology Engineer! As a Senior DFT Methodology Engineer, you will architect and develop the test methodologies that make our next generation of silicon testable, debuggable, and secure from the very first bring-up. NVIDIA has crafted...Full time$136k - $218.5k
...human imagination and intelligence. Make the choice to join us today.Design-for-Test Engineering at NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's...Full time$167.7k - $245.2k
...development of test benches to verify comprehensive Design-for-Test (DFT) architecture that supports ATE screening, in-system test,... ...verification. Minimum QualificationsBachelor’s in Electrical Engineering or equivalent with at least 7+ years (or Master's with 4+ years...Full timeTemporary workLocal areaFlexible hours3 days per week$167.7k - $245.2k
...Join us to power the future of the digital world.Your Impact:You will be in the Silicon One development organization as an ASIC DFT STA Engineer. You are a detail-oriented STA Engineer with strong analytical skills and a deep understanding of timing constraints, such as...Full timeTemporary workWork experience placementLocal areaFlexible hoursShift work$168k - $264.5k
As a Senior DFT Engineer - Post-Silicon , you will take pioneering DFT capabilities beyond implementation—connecting silicon behavior, test data, and product learning to deliver robust, production-ready DFT solutions for NVIDIA’s most advanced chips.NVIDIA has continuously...Full time- ...your career.THE ROLE:Looking for a diagnose expert, with scan DFT knowledge, to improve/enhance debug and diagnosis capabilities... ...diagnosis patterns and collaborating with design, verification, test engineering, and yield analysis groups.THE PERSON:Proficient in IC design/...
$183.19k - $256.47k
...worldwide. The Role We are seeking an experienced Electrical Power Engineer to join the TeraWave team at Blue Origin. In this role, you will... ...Failure Modes and Effects Analysis (DFMEA) Design for Test (DFT) Design for Manufacturability (DFM) EMI/EMC Analysis and mitigation...Permanent employmentTemporary workLocal areaWorldwide$237k - $356k
...Senior Principal Design for Test Engineer Ampere is a semiconductor design company for a new era, leading the future of computing with an innovative... ...- AT/AT - Speed) SCAN, MBIST, IO BIST and JTAG/IJTAG DFT features on our next generation highly complex server class...Work experience placementLocal area$207k - $230k
...Principal Post-Silicon Validation Engineer San Jose, California, United States Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through... ..., voltage, and temperature Partner with design and DFT teams to feed findings back into current and future...Flexible hours$195k - $250k
...company). The company is in execution mode and has a world-class engineering team with decades of experience in state-of-the-art silicon,... ...website eridu.ai to learn more. Responsibilities Define the DFT architecture of a multi-chip system SOC. involving all aspects...$167.7k - $245.2k
...to power the future of the digital world. Your Impact You will be in the Silicon One development organization as an ASIC DFT STA Engineer. You are a detail-oriented STA Engineer with strong analytical skills and a deep understanding of timing constraints, such as...Full timeTemporary workWork experience placementFlexible hoursShift work
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