TPU ASIC Physical Design Lead — Shape AI Hardware
Google is hiring for a leadership role in AI/ML hardware acceleration, focusing on TPU architecture and its integration within AI-driven systems. You will drive the physical design of critical sub-chips on the next-generation AI silicon, leading cross-functional teams and coordinating with RTL, DFT, and packaging groups to ensure scalable, high-performance designs. The role emphasizes collaboration with internal teams and external vendors to optimize power, performance, and area while navigating #J-18808-Ljbffr Google
Vacancy posted 4 days ago
Similar jobs that could be interesting for youBased on the TPU ASIC Physical Design Lead — Shape AI Hardware in Sunnyvale, CA vacancy
- ...Sunnyvale, CA is seeking a skilled hardware design engineer to drive the physical design of high-performance ASIC sub-chips for TPU architectures, from RTL to GDSII,... ...timing, power, and area. Join the AI and Infrastructure team to shape cutting-edge TPU hardware, collaborate...Suggested
$192k - $278k
Lead the physical design implementation and strategy for high-performance... ...closure for high-speed ASICs across various process nodes... .... Your expertise will shape the next generation of hardware experiences, delivering... ...of our next-generation AI silicon. Because of the...SuggestedWorldwideGoogle
Sunnyvale, CA5 days ago$192k - $278k
Lead the physical design implementation and strategy for high-performance silicon... ...closure for high-speed ASICs across various process... ...role, you’ll work to shape the future of AI/ML hardware acceleration. You will have... ...opportunity to drive cutting-edge TPU (Tensor Processing Unit)...SuggestedWorldwideGoogle
Sunnyvale, CA5 days ago$192k - $278k
...years of experience in physical design, including leading full-chip or sub-chip implementation... ...closure for high-speed ASICs across various process... ...role, you'll work to shape the future of AI/ML hardware acceleration. You will... ...to drive cutting-edge TPU (Tensor Processing Unit...SuggestedWorldwide- Google LLC in Sunnyvale, CA is seeking a senior hardware designer to shape the future of AI/ML hardware acceleration. You’ll own critical datapath blocks... ...accelerators. The role requires a track record in physical design, sub-7nm processes and high-density macros, plus...Suggested
$240k - $333k
Design, build, and scale constrained... ...high-speed physical-layer DSP blocks... ...jitter profiles.Lead the debugging... ...roadmaps for AI accelerators,... ...you’ll work to shape the future of AI/ML hardware acceleration.... ...cutting-edge TPU (Tensor Processing... .... As an ASIC Design Verification...WorldwideShift workGoogle
Sunnyvale, CA6 days ago$192k - $278k
...timing closure, and physical signoff.Understand math... ...to achieve optimal design closure.Develop and improve... ..., and final signoff.Lead sub-chip execution... ...role, you’ll work to shape the future of AI/ML hardware acceleration. You... ...to drive cutting-edge TPU (Tensor Processing Unit...WorldwideGoogle
Sunnyvale, CA5 days ago- Google is seeking a senior hardware design engineer to shape the future of AI/ML hardware acceleration. You will drive TPU architecture, verify complex digital designs, and oversee... ...and route (PNR), timing closure, and physical signoff. You will mentor a small team and...
$183k - $271k
...8 years of experience in ASIC physical design and methodologies in advanced... ...nodes. ~ Experience leading teams through RTL to GDS... ...this role, you'll work to shape the future of AI/ML hardware acceleration. You will... ...opportunity to drive cutting-edge TPU (Tensor Processing Unit)...Full timeWorldwide$192k - $278k
Lead the PCIe microarchitecture and... ...-performance designs that strictly... ...Verification and Physical Design teams... ...experience in ASIC design,... ...optimization, and hardware/firmware partitioning... ...’ll work to shape the future of AI/ML hardware... ...cutting-edge TPU (Tensor Processing...WorldwideGoogle
Sunnyvale, CA4 days ago- Google Sunnyvale seeks a PCIe Design Engineer to shape the PCIe/SoC RTL for next-... ...collaborating with software and hardware teams to deliver high-... ...will contribute to TPUs and AI hardware efforts, verifying... ...digital designs with emphasis on TPU architecture integration...
$171.6k - $245k
...TeamThe Common Hardware Group (CHG) creates... ...central to the AI era, powering... ...One—are shaping the technology... ...development—from design to qualification... ...the most complex ASICs being developed... ...Your ImpactAs a Lead Hardware Board... ...together across the physical and digital...Full timeContract workTemporary workWork at officeLocal areaFlexible hoursCISCO Systems
Milpitas, CA6 days ago$192k - $278k
...Coordinate with architecture, design teams, Sival and SW... ....Experience leading design verification of an SoC or large ASICs.Experience in collaborating... ...Your expertise will shape the next generation of hardware experiences,... ...combines the best of Google AI, Software, and...WorldwideGoogle
Mountain View, CA5 days ago$186.9k - $267.7k
...the TeamThe Common Hardware Group (CHG) creates... ...platforms central to the AI era, powering Cisco... ...Silicon One—are shaping the technology... ...product development—from design to qualification to... ....Work closely with physical design team to... ...engineering and 8+ years of ASIC Design experience,...Full timeTemporary workLocal areaFlexible hoursCISCO Systems
San Jose, CA3 days ago$171.6k - $245k
...Team The Common Hardware Group (CHG) creates... ...central to the AI era, powering... ...Silicon One—are shaping the technology industry... ...—from design to qualification... ...design technical lead is a key member... ...and/or merchant ASIC.Responsible for... ...together across the physical and digital worlds...Full timeTemporary workLocal areaFlexible hoursCISCO Systems
San Jose, CA5 days ago$192k - $278k
Lead the functional verification team for... ...portions of TPU Compute team, setting... ...cross-functional design, architecture and... ...subsystems for AI/ML accelerators.Experience... ..., you’ll work to shape the future of AI/ML hardware acceleration. You... ...systems. As an ASIC Design...WorldwideGoogle
Sunnyvale, CA5 days ago$192k - $278k
...verification team for portions of TPU designs, setting and communicating... ...this role, you’ll work to shape the future of AI/ML hardware acceleration. You will... .../ML-driven systems. As an ASIC Design Verification... ...Google's TPU designs, you will lead a team and own the...WorldwideGoogle
Sunnyvale, CA6 days ago$250k - $280k
...Silicon Valley-based hardware startup pioneering... ...that accelerate AI data centers to... ...widely validated by leading hyperscalers. Eridu... ...a hands-on ASIC Chip Design Lead to own chip design... ...verification, and physical design teams. This... ...the opportunity to shape the future of AI infrastructure...Full time$230k
Principal ASIC Engineering Lead (Physical Design OR STA)Up to $230k base, + 30% bonus plus around $800k-$1.2m in stocks which vests over 4 years. Total first... ...and packaging and a passion for working on bleeding-edge AI and high-performance silicon? Have you delivered enough...CyberCoders
San Jose, CA3 days ago- Google Inc. Sunnyvale is seeking an experienced PCIe Design Engineer to shape the future of AI/ML hardware acceleration, focusing on TPU architecture and integration. You will design and verify SoC-level RTL for next-gen data center accelerators, building clocking, reset...
$176.4k - $264.6k
...profound opportunity for AI to drive positive change in the physical world. Safer streets, more... ...T. Rowe Price, and other leading investors.About the... ...Head of AV HW Mechanical Design and lead our world class... ...delivery of our autonomous hardware solutions that enable Nuro...Immediate startFlexible hoursNuro
Mountain View, CA3 days ago$216.2k - $394k
ASIC Design Engineering Lead - SoC IP DMA In this highly visible, hands-on role, you will lead a team of engineers at the center of Apple's SOC IP... ...of design infrastructure, automation, and strategic use of AI and other emerging tools Be hands-on with the all activities...WorldwideRelocation$220k - $250k
...looking for a seasoned RTL Design Tech Lead to drive micro-architecture,... ...technical execution for complex ASIC/SoC programs. This role... ...Design Verification (DV) Physical Design (PD) STA / Timing /... ...Options. 401(k) match. WFH Hardware. Bolt is committed to building...Work from home- Commure in Mountain View is seeking a Brand Design Lead to drive brand expression across campaigns, product launches, in‑product moments, and storytelling. You'll define visual identity, build scalable design systems, translate complex clinical topics into human, trusted...
- ...supercomputing, high-performance computing, cloud, and AI. Whether you’re designing next-gen processors, enabling AI breakthroughs, or creating... ...that moves the world forward.THE ROLE: We are seeking a lead Physical Design Engineer to ensure that CPU Cores and SOC meet...
AMD
Santa Clara, CA4 days ago $167k - $275k
...GlobalFoundries:GlobalFoundries is a leading full-service... ...unique combination of design, development, and... ...customers the power to shape their markets. For more... ...architecture, verification, physical design, DFT, firmware,... ...multicore processors, AI accelerators, or high-performance...Full timeLocal areaGlobalfoundries
Santa Clara, CA6 days ago$192k - $278k
Lead, mentor, and manage a team of RTL Design Engineers performing tasks related... ...Design for Test, Physical Design, and Software... ...Chip Design, ASIC Digital Design, and... ..., you’ll work to shape the future of AI/ML hardware acceleration. You... ...cutting-edge TPU (Tensor Processing...WorldwideGoogle
Sunnyvale, CA7 days ago$200k - $300k
...Velaura's next generation Physical AI SoC. You will work... ...reliability and safety of the design, from individual RTL blocks through complete hardware and software systems... .... This role leads system level verification... ...disciplines, and helping shape the future of Physical...Full timeFlexible hoursVelaura AI
Santa Clara, CA19 days ago- Commure is seeking a Brand Design Lead to drive brand expression and product creative across campaigns, launches, and in-product experiences... ...accessible design, and partner with cross-functional teams to shape brand decisions. A hands-on senior designer with leadership...
- Hewlett Packard Enterprise Company in Sunnyvale, CA seeks a Senior Hardware Design Engineer to lead the design and development of next-generation networking hardware. The ideal candidate is a hands-on engineer with 10+ years of experience in complex hardware board design...
Do you want to receive more vacancies?
Subscribe and receive similar vacancies to TPU ASIC Physical Design Lead — Shape AI Hardware. Be the first to apply!
