RISC-V Verification Engineer: Test Generator
Qualcomm
Qualcomm Technologies, Inc. in Cupertino seeks a verification engineer to contribute to a Python-based random test generation framework and its assembler library for the RVA23.1 ISA, enabling a JIT-style simulator that exercises privileged modes, virtual memory, and vector extensions. You will implement RISC-V extension generation objects, verify encodings, and craft constraint-driven test themes to boost RTL coverage while collaborating with ISS/RTL teams on failures. #J-18808-Ljbffr Qualcomm
Vacancy posted 1 day ago
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