Sign up to access all features of our service.
  • Job search
  • Favorites
  • Create a CV
    New
  • Salaries
  • Subscriptions

Design Verification Engineer

$120k - $200k

SambaNova Systems

Design Verification Engineer

San Jose, California, United States

The era of pervasive AI has arrived. In this era, organizations will use generative AI to unlock hidden value in their data, accelerate processes, reduce costs, drive efficiency and innovation to fundamentally transform their businesses and operations at scale.

SambaNova Suite™ is the first full-stack, generative AI platform, from chip to model, optimized for enterprise and government organizations. Powered by the intelligent SN40L chip, the SambaNova Suite is a fully integrated platform, delivered on-premises or in the cloud, combined with state-of-the-art open-source models that can be easily and securely fine-tuned using customer data for greater accuracy. Once adapted with customer data, customers retain model ownership in perpetuity, so they can turn generative AI into one of their most valuable assets.

About the Team

The Design Verification team works on the RDU, SambaNova's chip for machine learning and AI workloads. This group focuses on chip-level control and initialization: sequencing, state transitions, clocking, and recovery across multiple subsystems on the chip. You'll build SystemVerilog and UVM verification environments alongside architects, RTL designers, and firmware engineers, and take ownership of verification plans from first draft through closure. The team works closely with the broader verification organization, so debugging and root-causing issues often means coordinating across groups rather than working in isolation.

About the Role

SambaNova Systems is looking for a talented and motivated Design Verification Engineer, DFT to help us build state of the art RDU chips for machine learning and artificial intelligence.

Responsibilities

Some of your responsibilities will include:

  • Develop and execute comprehensive verification plans for complex chip-level control and initialization features
  • Develop SystemVerilog/UVM based verification environments, test sequences, checkers, assertions, and functional coverage
  • Verify complex sequencing, dependencies, state transitions, and recovery scenarios across multiple chip subsystems
  • Develop directed and constrained-random tests to identify architectural and implementation corner cases
  • Closely work with architects, RTL designers, firmware, and other verification teams to understand design intent and drive verification closure
  • Debug simulation and regression failures and work with design teams to root-cause and resolve issues
  • Analyze regression failures, functional and code coverage and drive verification to closure
Required Qualifications
  • B.S. in Computer Science, Computer Engineering, or related field
  • 5+ years relevant industry experience
  • Strong understanding of digital design, SoC architecture, and verification methodologies
  • Strong proficiency in SystemVerilog and UVM is required
  • Experience with constrained-random verification, functional coverage, and assertion-based verification
  • Good understanding of chip initialization, control sequencing, clocking, and cross-domain interactions
  • Strong simulation debug and problem-solving skills
  • Proficiency in scripting languages, e.g. Python, Perl, TCL and shell scripting, etc. is required
Preferred Qualifications
  • Familiarity with CDC/RDC concepts and verification methodologies
  • Fluency in Claude / AI tools for verification development and debug

Base Salary Range:

$120,000 - $200,000 USD

Submission Guidelines Please note that in order to be considered an applicant for any position at SambaNova Systems, you must submit an application form for each position for which you believe you are qualified.

EEO Policy SambaNova Systems is an Equal Opportunity/Affirmative Action Employer. All qualified applicants will receive consideration for employment without regard basis of age (40 and over), color, disability, gender identity, genetic information, marital status, military or veteran status, national origin/ancestry, race, religion, creed, sex (including pregnancy, childbirth, breastfeeding), sexual orientation, and any other applicable status protected by federal, state, or local laws.

Benefits Summary for US-Based, Full-Time Employment Positions SambaNova offers a competitive total rewards package, including the base salary, plus equity and benefits. We cover 95% premium coverage for employee medical insurance, and 77% premium coverage for dependents and offer a Health Savings Account (HSA) with employer contribution. We also offer Dental, Vision, Short/Long term Disability, Basic Life, Voluntary Life, and AD&D insurance plans in addition to Flexible Spending Account (FSA) options like Health Care, Limited Purpose, and Dependent Care. Our library of well-being benefits available to you and your dependents includes a full subscription to Headspace, Gympass+ membership with access to physical gyms, One Medical membership, counseling services with an Employee Assistance Program, and much more.

Vacancy posted 2 days ago
Similar jobs that could be interesting for youBased on the Design Verification Engineer in San Jose, CA vacancy
  • Position:Design Verification Engineer (Einfochips)Job Description:Experience: 6+ YearsLocation: San Jose CAJob Description:What candidate will Be Doing:At-least 6+ years of experience in System Verilog HVL and C++/CAt-least 6+ year of experience in UVM.Experience in complete... 
    Suggested
    Full time
    Work at office

    Arrow ECS

    San Jose, CA
    2 days ago
  • $165k - $241.4k

     ...Switching, Routing, and Wireless products. We design networking hardware for enterprises,...  ...ImpactParticipate in the ASIC design verification for Cisco high-end switching products....  ...electrical/computer science/computer engineering/related degree and 7+ years of related... 
    Suggested
    Full time
    Temporary work
    Local area
    Worldwide
    Flexible hours

    CISCO Systems

    San Jose, CA
    5 days ago
  • $167.7k - $245.2k

     ...and help each other grow. Because full product development—from design to qualification to production—is within our team, we’re able...  ...the digital world.Your ImpactSet vision and strategy for ASIC verification methodology and execution across multiple programs and product... 
    Suggested
    Full time
    Temporary work
    Local area
    Flexible hours

    CISCO Systems

    San Jose, CA
    4 days ago
  •  ...enterprise environments, including Goldman Sachs, IBM Cloud, Microsoft Azure, and Oracle.THE PERSON:We are seeking a high‑impact Design Verification Engineer with strong technical depth, ownership, and the ability to drive verification closure on complex, high‑performance ASIC... 
    Suggested

    AMD

    Santa Clara, CA
    5 days ago
  • Change the world. Love your job. Texas Instruments is seeking Design Verification Engineer. In this role you will confirm the accuracy of designs for analog and mixed signal electronic parts, components, or integrated circuitry for analog and mixed signal electronic equipment... 
    Suggested
    Local area

    Texas Instruments

    Santa Clara, CA
    5 days ago
  • $180.2k - $297.2k

     ...by millions of people around the world. Come build with us!Role and ResponsibilitiesWe are seeking a highly skilled GPU Design Verification Engineer (GCDV) to join our team at SARC/ACL. As a key member of our team, you will concentrate on graphics core verification, with... 
    Hourly pay
    Full time
    Relocation

    Samsung Semiconductor

    San Jose, CA
    5 days ago
  •  ...high-performance computing, cloud, and AI. Whether you’re designing next-gen processors, enabling AI breakthroughs, or creating...  ...ROLE: We are looking for an adaptive, self-motivated design verification engineer to join our growing team. As a key contributor, you will be... 

    AMD

    San Jose, CA
    2 days ago
  • $100k

     ...problems. We are growing our team and looking for contributors of all seniorities.Tenstorrent is seeking a SoC Physical Design Verification Engineer to drive full-chip signoff and ensure manufacturable, high-quality silicon across advanced technology nodes. You’ll lead... 
    Permanent employment

    Tenstorrent

    Santa Clara, CA
    2 days ago
  • $151k - $251.8k

     ...performance computing devices consumed by millions of people around the world. Come build with us!Role and ResponsibilitiesAs a Design Verification Engineer, you will contribute to the verification of System IP, including coherent interconnects and caches. The ideal candidate... 
    Hourly pay
    Full time
    Relocation

    Samsung Semiconductor

    San Jose, CA
    3 days ago
  • $141.91k - $200.34k

    Job Details:Job Description: Intel is seeking a Design Verification Engineer for the Silicon Chassis team. In this role, you will contribute to verification of next-generation interconnect and chassis IPs that scale across multiple product families. You will work closely... 
    Full time
    Local area
    Immediate start
    Shift work

    Intel

    Santa Clara, CA
    3 days ago
  • $106.4k - $172.15k

     ...problem-solving, stronger relationships, and the kind of precision that drives great outcomes.Job SummaryYour Career As a Design Verification engineer on the ASIC team, you will ensure that the ASICs in our groundbreaking next-generation firewall products meet or exceed... 
    Full time
    Casual work
    Work at office

    Palo Alto Networks

    Santa Clara, CA
    5 days ago
  •  ...Design Verification Engineer Rootshell Enterprise Technologies Inc. is a recognized provider of professional IT Consulting services in the US. We are actively seeking a Design Verification Engineer for one of our clients. Location: Santa Clara, CA – Onsite Job... 

    Rootshell Inc

    Santa Clara, CA
    2 days ago
  •  ...Design Verification Engineer Location: Sunnyvale, CA Rate: 50/hr W2 Client is Microsoft Required: ~7+ years of ASIC verification experience ~ UVM/System Verilog ~ VCS simulator, Verdi ~2, 3 projects experience with UVM based testbench, coverage closure... 

    Omega Solutions

    Santa Clara, CA
    2 days ago
  •  ...Months Top Must Have Skills: Solid minimum 8 + years Design Verification Experience Verification Experience with DDR5 Controller...  ...looking for an adaptive, self-motivative Design Verification Engineer to join our growing team. As a key contributor, you will be... 

    Varite

    Santa Clara, CA
    2 days ago
  •  ...Job Title Design Verification Engineer Job Description Responsibilities (depends on the detailed assignment, the candidate may actually carry out a portion of the responsibilities below): Design the verification architecture of a high-end 64 bit super scalar... 

    Netpace

    Santa Clara, CA
    2 days ago
  •  ...Job Title: SoC Design Verification Engineer Location: San Jose, CA Job Description: We are looking for a highly skilled SoC/Performance DV engineer to drive system-level validation and performance characterization of complex SoCs. The role involves... 
    Night shift

    SWITS DIGITAL Private Limited

    San Jose, CA
    2 days ago
  • $184.7k - $324.8k

     ...Design Verification Engineer Does making the next great technology product excite you? Imagine what you could do here. At Apple, our new ideas have a way of becoming great products, services, and customer experiences very quickly. We bring passion and dedication to... 
    Relocation

    Apple

    Cupertino, CA
    5 days ago
  •  ...Design Verification Engineer As a Design Verification Engineer, you will contribute to the functional verification of GPU Subsystems such as Shader, Texture, and Memory Systems. Responsibilities Triage regression failures and make testbench updates Debug... 

    Kasmo Global

    San Jose, CA
    2 days ago
  •  ...Design Verification Engineer Responsibilities will include developing the verification environment; developing test plans and verifying the function of the ASIC/FPGA at both the full chip and block level. Skills: - Minimally, we are looking for someone with 1. Min... 

    Software Technology Inc

    Santa Clara, CA
    2 days ago
  • $122.44k - $232.19k

     ...workloads.Position OverviewWe are seeking experienced pre-silicon verification engineers who are passionate about driving innovation at the...  ...hardware implementation. Working closely with architecture, design, and software teams, you will help drive verification strategies... 
    Full time
    Local area
    Immediate start
    Shift work

    Intel

    Santa Clara, CA
    3 days ago
  • $164.47k - $311.89k

    Job Details:Job Description: About the RoleIntel is seeking a Senior Design Verification Engineer for the Silicon Chassis team. In this role, you will own end-to-end verification of critical chassis and interconnect IP blocks from planning through signoff. You will drive... 
    Full time
    Internship
    Local area
    Immediate start
    Shift work

    Intel

    Santa Clara, CA
    3 days ago
  • $167.7k - $245.2k

     ...help each other grow. Because full product development—from design to qualification to production—is within our team, we’re able...  ..., experiment more, and work quickly. As an ASIC Design Verification Engineer, you will play a critical role in developing Cisco’s revolutionary... 
    Full time
    Temporary work
    Local area
    Flexible hours

    CISCO Systems

    San Jose, CA
    1 day ago
  •  ...perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: As a Senior CPU Design Verification Engineer, you will join a CPU testbench infrastructure team responsible for building scalable verification environments for next-... 

    AMD

    Santa Clara, CA
    5 days ago
  • $136k - $218.5k

    We're now looking for a Senior Digital Design Verification Engineer! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel... 
    Full time

    Nvidia

    Santa Clara, CA
    3 days ago
  •  ...subsystem and standard interfaces using SystemVerilog/UVM. Develop verification plans, UVM testbenches, test cases, assertions (SVA), and...  ...management, and exception handling. Execute regressions, debug RTL/design issues, and drive functional and code coverage closure.... 

    ACL Digital

    San Jose, CA
    4 days ago
  • $124k - $208.4k

     ...segments) consumed by millions of people around the world. Come build with us!Role and ResponsibilitiesAs a Senior GPU Design Verification Engineer - GCDV, you will contribute to the verification of top-level graphic core for Samsung’s next-generation mobile GPU.This... 
    Hourly pay
    Full time
    Relocation

    Samsung Semiconductor

    San Jose, CA
    4 days ago
  • $136k - $218.5k

    NVIDIA is seeking a hardworking Senior ASIC Design Verification Engineer to help drive sign-off strategies for world's leading GPUs and SoCs. This position offers you an outstanding opportunity to influence performance of the next generation GPU and SoC, allowing you to... 
    Full time
    Work experience placement
    Remote work

    Nvidia

    Santa Clara, CA
    2 days ago
  • $2,000 per month

     ...hardware for frontier intelligence. We co-design chips, racks, software, and...  ...top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure...  ...Job Summary We are seeking a Design Verification Engineer to join our Interface IP DV team... 
    Work at office
    Relocation package

    Etched

    San Jose, CA
    21 days ago
  • $2,000 per month

     ...hardware for frontier intelligence. We co-design chips, racks, software, and...  ...top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure...  ...Job Summary We are seeking a Design Verification Engineer to join our Internal IP DV team... 
    Work at office
    Relocation package
    Night shift

    Etched

    San Jose, CA
    21 days ago
  • $2,000 per month

     ...hardware for frontier intelligence. We co-design chips, racks, software, and...  ...top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure...  ...Job Summary We are seeking a Design Verification Engineer to join our Systems/Performance... 
    Work at office
    Relocation package

    Etched

    San Jose, CA
    21 days ago

Do you want to receive more vacancies?

Subscribe and receive similar vacancies to Design Verification Engineer. Be the first to apply!