Founding RTL Design Engineer for AI‑Driven SoCs
Acceler8 Talent
Acceler8 Talent is partnering with a startup to find a Founding RTL Design Engineer in Palo Alto. This role involves driving RTL implementation for SoC targeting advanced machine learning workloads, requiring 5+ years of experience in RTL design. Ideal candidates will have strong SystemVerilog skills, hands-on experience in specialized hardware accelerators, and proficiency in Python for design automation tasks. #J-18808-Ljbffr Acceler8 Talent
Vacancy posted 5 days ago
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