ASIC Design Verification Engineer, TPU Compute
$138k - $198kGoogle Inc.
Location: Sunnyvale, CA, USA Apply Qualifications Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 4 years of experience with design verification. Experience in verifying digital logic at RTL using SystemVerilog/UVM for ASICs. Preferred qualifications Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture. 6 years of experience with industry standard tools, languages and methodologies relevant to the development of silicon-based ICs and chips. Experience with three or more SoC projects/cycles. Experience verifying compute IPs. Strong problem‑solving, analytical, and communication skills, with the ability to work effectively in a team environment. About the job In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting‑edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML‑driven systems. As an ASIC Design Verification Engineer, you will be part of a team developing cutting‑edge ASICs used to accelerate computation in data centers. You will have dynamic, multi‑faceted responsibilities in areas such as project definition, design verification and silicon bring‑up. You will participate in the architecture, documentation, and verification of the next generation of data center accelerators. Responsibilities Plan the verification of complex digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios. Create a constrained‑random verification environment using SystemVerilog and Universal Verification Methodology (UVM). Identify and write all types of coverage measures for stimulus and corner‑cases. Debug tests with design engineers to deliver functionally correct design blocks. Close coverage measures to identify verification holes and to show progress towards tape‑out. The US base salary range for this full‑time position is $138,000‑$198,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job‑related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process. Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google. Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents‑to‑be, criminal histories consistent with legal requirements, or any other basis protected by law. See also Google's EEO Policy , Know your rights: workplace discrimination is illegal , Belonging at Google , and How we hire . Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting. To all recruitment agencies: Google does not accept agency resumes. Please do not forward resumes to our jobs alias, Google employees, or any other organization location. Google is not responsible for any fees related to unsolicited resumes. #J-18808-Ljbffr Google Inc.
$138k - $198k
...Bachelor's degree in Electrical Engineering, Computer Engineering, Computer... ...4 years of experience with design verification. Experience with SystemVerilog... ...SystemVerilog/UVM for ASICs. Familiarity with ASIC standard... ...to drive cutting‑edge TPU (Tensor Processing Unit) technology...SuggestedWorldwide$138k - $198k
ASIC Design Verification Engineer, AI and Infrastructure Qualifications Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical... ...will have an opportunity to drive TPU (Tensor Processing Unit)...SuggestedFull timeWorldwide$138k - $198k
...Bachelor's degree in Electrical Engineering, Computer Engineering, Computer... ...4 years of experience with design verification. Experience with SystemVerilog... ...to drive cutting‑edge TPU (Tensor Processing Unit) technology... .../ML‑driven systems. As an ASIC Design Verification...SuggestedFull timeWorldwide$138k - $198k
Google Inc. seeks an ASIC Design Verification Engineer in Sunnyvale, CA, to shape future AI/ML hardware acceleration. You will drive TPU technology for cutting-edge applications and be responsible for verifying complex digital designs. Ideal candidates hold a Bachelor's...SuggestedFull time$132k - $189k
...leading technology company is seeking an ASIC Formal Verification Engineer in Sunnyvale, CA. This role involves... ...of AI/ML hardware with a focus on TPU technology. Candidates should have a... ...collaboration on groundbreaking innovations in computing power. #J-18808-Ljbffr Google Inc.Suggested$175k - $215k
...ASIC Design Verification Engineer Waymo is an autonomous driving technology company with the mission to be the world's most trusted driver. Since... ...billions in simulation across 15+ U.S. states. Waymo's Compute Team is tasked with a critical and exciting mission: We...Full timeRemote work$138k - $198k
...degree in Electrical Engineering, Computer Engineering, Computer... ...experience with digital design using SystemVerilog... ...drive cutting‑edge TPU (Tensor Processing Unit... ...your design and verification expertise to verify complex... ...implement logic for ASIC products according to...Worldwide$138k - $198k
...degree in Electrical Engineering, Computer Engineering, Computer... ...experience with digital design using SystemVerilog... ...implement logic for ASIC products according to... ...to drive cutting‑edge TPU (Tensor Processing... ...leverage your design and verification expertise to verify...Full timeWorldwide- ...technology will revolutionize High-Performance (HPC) and Cloud computing, as well as other industries where low power... ...role: Avicena is seeking a talented and detail-oriented ASIC Design Verification (DV) Engineer to join our chip design team. You'll play a crucial role...
$136k - $218.5k
...NVIDIA is seeking a hardworking Senior ASIC Design Verification Engineer to help drive sign-off strategies for world's leading GPUs and SoCs. This... ...possible today and define the platform for the future of computing. What you will be doing: Work as part of Circuit...Work experience placementRemote work- Google Inc. in Sunnyvale, CA, is looking for an ASIC Design Verification Engineer to shape the future of AI/ML hardware acceleration. In this role, you will drive cutting-edge TPU technology and be part of a team developing custom silicon solutions. You will have responsibilities...
$116k - $166k
Google Inc. is seeking an ASIC Design Verification Engineer in Sunnyvale, California, to shape the future of AI/ML hardware acceleration. You will work with cutting‑edge TPU technology, verifying complex designs and ensuring operational excellence in data centers. This...- Google Inc. is seeking an ASIC Design Verification Engineer to drive TPU technology and shape the future of AI/ML hardware acceleration. You will work with a talented team to verify complex digital designs, improve verification environments, and collaborate with engineers...
$106.4k - $172.15k
...Design Verification Engineer At Palo Alto Networks®, we're united by a shared mission—to protect our digital way of life. We thrive at the intersection... .... Your Career As a Design Verification engineer on the ASIC team, you will ensure that the ASICs in our groundbreaking...Full timeCasual workWork at office$138k - $198k
...technology. In this role, you will drive cutting-edge TPU technology that powers some of the most demanding applications. Responsibilities include creating design specifications, developing SystemVerilog RTL for ASIC products, and collaborating with various teams to...- ...in Sunnyvale is seeking a skilled engineer to innovate in AI/ML hardware... ...collaborating with validation and design teams to ensure quality and achieve... ...opportunity to contribute to cutting-edge TPU technology and help shape the future of computing. #J-18808-Ljbffr GoogleFull time
$163k - $237k
Qualifications Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a... .... 8 years of experience with digital design using SystemVerilog RTL. Experience... ...performance, efficiency, and integration. As an ASIC Design Engineer, you will be part of a...Worldwide- Qualcomm is seeking an ASIC Engineer to define, design, optimize, and document IP development for high-performance products. The role involves collaboration with cross-functional teams and requires strong ASIC knowledge. Candidates should have a degree in Science, Engineering...
$90 per hour
...We are looking for talented engineers and leaders who have an... ...want to drive cutting edge designs from concept to silicon to... ...future of mobility. Senior ASIC Design Verification Engineer Summary: As... ...in Electrical Engineering, Computer Science, or related field...Flexible hours$138k - $198k
Google Inc. is seeking an experienced ASIC Design Verification Engineer in Sunnyvale, CA, to work on cutting-edge TPU technology for AI/ML applications. You will verify complex digital designs and contribute to the development of new data center accelerators. The ideal...- NVIDIA Gruppe is seeking a Low Power Design/Verification ASIC Engineer for New College Grad 2026 in Santa Clara, California. This role involves collaboration with architecture, design, and software teams to establish power-management solutions for NVIDIA’s advanced products...
$75k - $275k
...Velaura is building the next generation of compute platforms for Physical AI. As AI... ...a team of exceptional architects and engineers to rethink how AI, sensing, memory, and... ...The Role We are looking for talented Design Verification Engineers to help verify and deliver Velaura...Flexible hours$152.1k - $246.05k
Job Summary As a Design Verification engineer on the ASIC team, you will ensure that the ASICs in our groundbreaking next‑generation firewall products meet or exceed industry‑leading requirements for features, performance, and reliability. Your responsibilities include...Work at office$138k - $317.8k
...scalable, secure, and user‑friendly applications. Principal Design Verification Engineer - UAL & PCIe Subsystems Location: Santa Clara, CA (Onsite)... ...the development cycle. Required Skills BS/MS/PhD in Computer Science, Electrical Engineering, or Computer Engineering....Local areaImmediate startVisa sponsorshipRelocation package$141.91k - $200.34k
...Job Description: Intel is seeking a Design Verification Engineer for the Silicon Chassis team. In this... ...BS/MS in Electrical Engineering, Computer Science, or related field, with 3+ years... ..., tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon...Local areaImmediate startShift work$165k - $241.4k
...help each other grow. Because full product development—from design to qualification to production—is within our team, we're able... ...digital world. Your Impact Set vision and strategy for ASIC verification methodology and execution across multiple programs and...Full timeTemporary workLocal areaFlexible hours- ...Solid minimum 8 + years Design Verification Experience Verification... ...motivative Design Verification Engineer to join our growing team. As... ...libraries like UVM ~10+years of ASIC design verification... ...Bachelor's or master's degree in computer engineering/Electrical...
- ...Design Verification Engineer Location: Sunnyvale, CA Rate: 50/hr W2 Client is Microsoft Required: ~7+ years of ASIC verification experience ~ UVM/System Verilog ~ VCS simulator... ...Processor verification, floating point computational unit highly desired C/C++...
- ...products that accelerate next-generation computing experiences-from AI and data centers,... ...: We are seeking a high-impact Design Verification Engineer with strong technical depth,... ...closure on complex, high-performance ASIC designs. The ideal candidate brings...
$153.2k - $229.8k
Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: Qualcomm is a company of inventors... ...Age - and this is where you come in as an ASIC Design Verification Engineer. The team is responsible for the complete...Work experience placement
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