Sr. DFT Design Engineer, AWS ML Acceleration
$159.2k - $215.3kAnnapurna Labs (U.S.) Inc.
Salary: $159,200 - 215,300 per year Requirements:
- Bachelors degree in computer science, electrical engineering, or a related discipline
- 5+ years of hands-on ASIC design experience, including end-to-end ownership of major SoC blocks
- Working knowledge of industry-standard DFT tools and methodologies, including ATPG, JTAG, MBIST, and test quality versus test time trade-offs
- Experience developing automation scripts
- Masters degree or Ph.D. in electrical engineering or a related field
- Experience with RTL coding and debug, plus performance, power, and area analysis trade-offs
- Experience using modern ASIC/FPGA design and verification tools
- Experience with SoC bring-up and post-silicon validation
- MS degree in computer science, electrical engineering, or a related field
- Experience with gate-level testing and multi-clock design practices (CDC)
- Broad knowledge of chip design from micro-architecture through physical design
- Strong understanding of design verification (DV) simulation methodologies
- Strong programming and scripting ability in Perl, Python, or Tcl
- Experience with industry-standard DFT/SCAN/ATPG tools
- Experience developing and analyzing STA constraints for DFT modes
- Practical experience with silicon debug
- Define and develop advanced Design for Test (DFT) architectures for leading-edge technology nodes
- Partner closely with block designers and the physical design team to deliver efficient DFT solutions
- Serve as the main contact for cross-functional partners in PD, Architecture, and Product Engineering to align schedules and objectives
- Mentor junior engineers through code reviews, methodology coaching, and technical support
- Own project schedules and deliverables, ensuring high-quality DFT implementation from RTL through silicon bring-up
- AWS
- Cloud
- FPGA
- Hardware
- Support
- Machine Learning
- Perl
- Python
More:
We build custom SoCs that power AWS machine learning servers, including AWS Inferentia and Trainium systems, and we operate at massive scale while rapidly adopting emerging technologies. As part of the Cloud-Scale Machine Learning Acceleration team, we design and optimize hardware in our data centers and are looking for a Senior DFT Design Engineer to help us advance new technologies and architectures while maintaining high design quality and making thoughtful trade-offs. We offer comprehensive benefits, including medical, dental, vision, prescription coverage, basic life and AD&D insurance with supplemental life options, EAP, mental health support, a medical advice line, flexible spending accounts, adoption and surrogacy reimbursement, 401(k) matching, paid time off, parental leave, and sign-on payments plus restricted stock units. This role is based in Austin, Texas, with a listed base salary range of USD 159,200 to 215,300 annually.
last updated 37 week of 2026
$136k - $184k
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