Staff PCIe/CXL Design Engineer

Responsible for all aspects of SoC design and chip bring up. Work with members of the SoC Design and Verification, System Verification, Firmware, Emulation, and Physical Design teams. Deliver working PCIe hardware solutions within the SoC. Develop micro-architecture and design specifications. Implement and verify complex logic designs. Hands-on verification and validation on emulation platforms running with the SW drivers. Requirements MS EE/CS+5 year of experience or PhD EE/CS Experience of PCIe root complex and end points Verilog RTL logic design experience of multi-million gate ASICs Experience writing specifications and converting them to design Experience with bring up and lab debug of FPGAs prototyping and silicon Experience with commercial PCIe/CXL IPs such as Synopsys. Good communication with IP vendors Experience in NVMe Knowledge of various DMA architectures Knowledge of next-gen interconnect fabric protocol (OpenCAPI, CXL, CCIX, GenZ) #J-18808-Ljbffr FLC Technology Group