ASIC Core DFT Technical Lead
$89.86 - $128.7 per hourCisco Systems
The application window is expected to close on: 09/22/2026Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received.Meet the TeamThe Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various sizes, the Public Sector, and Non-Profit Organizations across the world. Cisco Silicon One (#CiscoSiliconOne) is the only unifying silicon architecture in the market that enables customers to deploy the best-of-breed silicon from Top of Rack (TOR) switches all the way through web scale data centers and across service provider, enterprise networks, and data centers with a fully unified routing and switching portfolio. Come join us and take part in shaping Cisco's ground-breaking solutions by designing, developing and testing some of the most complex ASICs being developed in the industry. Your ImpactAs an ASIC Technical Lead, you will stand at the absolute forefront of networking hardware innovation, directly shaping the future of Cisco’s industry-defining Silicon One architecture. By driving cutting-edge Design-for-Test (DFT) strategies and pioneering custom IP solutions, you will bridge the gap between front-end RTL, physical design, and post-silicon validation for some of the world's most complex ASICs. Your technical vision across bare die, stacked die, and new silicon device models will guarantee elite quality and uncompromised testability. Ultimately, your leadership will fuel the next generation of high-performance routing and switching systems deployed across global enterprises, web-scale data centers, and tier-one service providers worldwide.Minimum QualificationsBachelors + 8 years of related experience, or Masters + 6 years of related experience, or PhD + 3 years of related experienceExperience with Jtag protocols, Scan and BIST architectures, including memory BIST, boundary scan and post silicon debug. Experience with ATPG and EDA tools like TestMax, Tetramax, Tessent tool sets, PrimeTime Prior verification experience including, System Verilog Logic Equivalency checking and validating the Test-timing of the design Prior experience with Tcl and Python/Perl.Preferred QualificationsVerilog design experience – developing custom DFT logic & IP integration; familiarity with functional verificationDFT CAD development – Test Architecture, Methodology and InfrastructureWhy Cisco? At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. We are Cisco, and our power starts with you. Message to applicants applying to work in the U.S. and/or Canada:The starting salary range posted for this position is $186,900.00 to $267,700.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits.Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process.U.S. employees are offered benefits, subject to Cisco’s plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time.U.S. employees are eligible for paid time away as described below, subject to Cisco’s policies:10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees1 paid day off for employee’s birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by CiscoNon-exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employeesExempt employees participate in Cisco’s flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations)80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours of unused sick time carried forward from one calendar year to the nextAdditional paid time away may be requested to deal with critical or emergency issues for family membersOptional 10 paid days per full calendar year to volunteerFor non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco’s policies.Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows:.75% of incentive target for each 1% of revenue attainment up to 50% of quota;1.5% of incentive target for each 1% of attainment between 50% and 75%;1% of incentive target for each 1% of attainment between 75% and 100%; andOnce performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation.For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid.The applicable full salary ranges for this position, by specific state, are listed below:New York City Metro Area:$186,900.00 - $307,800.00Non-Metro New York state & Washington state:$166,300.00 - $274,100.00* For quota-based sales roles on Cisco’s sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined.** Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.Job SummaryJob number: 2006625Date posted : 2026-08-04Profession: Product and EngineeringEmployment type: Full time
$186.9k - $267.7k
...hardware platforms for Cisco's core Switching, Routing, and... ...testing some of the most complex ASICs being developed in the industry. Your ImpactAs an ASIC Technical Lead, you will stand at the absolute... ...cutting-edge Design-for-Test (DFT) strategies and pioneering custom...SuggestedFull timeTemporary workLocal areaWorldwideFlexible hours$186.9k - $267.7k
...optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products.... ...developing and testing some of the most complex ASICs being developed in the industry. Your ImpactAs an ASIC DFT - Emulation Technical Lead, you will play a critical role in driving...SuggestedFull timeTemporary workLocal areaFlexible hours$214.1k - $309.8k
...central to the AI era, powering Cisco’s core Switching, Routing, and Wireless products... ...One development organization as an ASIC Technical Lead- MBIST engineer. As a member of this team... ...s with 10+ years) of experience in ASIC DFT.Prior experience with memory architectures...SuggestedFull timeTemporary workLocal areaFlexible hours$186.9k - $267.7k
...central to the AI era, powering Cisco’s core Switching, Routing, and Wireless... ...Silicon One development organization as an ASIC Technical Leader- DFT. You will work with Front-end RTL... ...generation networking chips. You will help lead to drive the DFT and quality process...SuggestedFull timeTemporary workLocal areaFlexible hours$89.86 - $128.7 per hour
...central to the AI era, powering Cisco’s core Switching, Routing, and Wireless... ...Silicon One development organization as an ASIC Technical Leader- DFT. You will work with Front-end RTL... ...generation networking chips. You will help lead to drive the DFT and quality process...SuggestedFull timeTemporary workLocal areaFlexible hours$186.9k - $267.7k
...optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless... ...and testing some of the most complex ASICs being developed in the industry.Your Impact:As a technical leader, you will own and drive end-to-end DFT flow architecture, building and maintaining...Full timeTemporary workLocal areaFlexible hours$186.9k - $267.7k
...innovative hardware platforms central to the AI era, powering Cisco’s core Switching, Routing, and Wireless products for organizations... ...QualificationsBachelor’s degree in Electrical or Computer engineering and 8+ years of ASIC Design experience, or Master’s degree in Electrical Engineering...Full timeTemporary workLocal areaFlexible hours$186.9k - $267.7k
...the AI era, powering Cisco’s core Switching, Routing, and Wireless... ...the planning and execution of ASIC verification for complex... ...verification efforts.Provide technical leadership and mentorship to verification... ...successful silicon bring-up.Lead complex debug efforts, perform...Full timeTemporary workLocal areaFlexible hours$214.1k - $309.8k
...position provides high-level technical leadership for the Silicon One... ...bridging the gap between advanced DFT architecture, silicon quality,... ...to drive DPPM to industry-leading lows.Data-Driven Process OptimizationMonitor... ....Deep knowledge of the full ASIC development lifecycle,...Full timeTemporary workWork at officeLocal areaFlexible hours- ...AI breakthroughs, or bringing leading edge products to market, every... ...impact.You're an experienced ASIC/FPGA design engineer who has delivered... .... Instead, you'll serve as a technical partner to chip leads across... ...test and DFT methodologiesSilicon bring-up...
- ...Job DescriptionHi,Hope you are doing great!!!Please find the below Job Description and do let me know if you are interested.Position: Core Java Tech LeadLocation: Milpitas, CADuration: Full TimeJob Description:-The ideal candidate should possess:· Good in requirement...
$143.8k - $230k
...Engineer to serve as the Chip Lead for our next-generation silicon... ...role, you will be the primary technical anchor responsible for the top... ...direct industry experience in ASIC/SoC digital design, with a... ...interconnects).Familiarity with DFT (Design for Test) planning, including...Full timeLocal area$171.6k - $245k
...the AI era, powering Cisco’s core Switching, Routing, and Wireless... .... Your Impact Hardware design technical lead is a key member of the Cisco... ...on Silicon One and/or merchant ASIC.Responsible for system and board... ...groups including ASIC, DFT, Signal Integrity, software, Diagnostics...Full timeTemporary workLocal areaFlexible hours$183k - $247.6k
...software stacks enable us to take on technical challenges that have never... .... We’re looking for an ASIC Design Eengineer to help us trail... ...correct clock/reset/functional/DFT signal routing- Analyze design... ...Conversations on Race and Ethnicity (CORE) and AmazeCon conferences,...Local areaFlexible hours$186.9k - $267.7k
...innovative hardware platforms central to the AI era, powering Cisco’s core Switching, Routing, and Wireless products for organizations... ...With:You will be in the Silicon One development organization as an ASIC design verification engineer in San Jose, CA. You collaborate...Full timeTemporary workWork at officeLocal areaFlexible hours- ...architecture allows Cerebras to deliver industry-leading training and inference speeds; over 10... ...RoleWe are looking for a hands-on SDET Technical Lead to establish and lead Release... ...& Feature Qualification for AI Inference Core.The Production Engine for Inference Core...Work at officeRemote work3 days per week
$122.44k - $232.19k
...unparalleled blend of an industry-leading technology, a rich IP portfolio, a... ...supply chain.Position OverviewWe seek a DFT Application Engineer to provide technical support to Intel Foundry Services... ...quality improvements in ASIC DFT/DFM and ATPG validation methodology...Full timeInternshipLocal areaImmediate startShift work$171.6k - $245k
...to close on: 09/24/2026ASIC Engineering Technical Leader (onsite) - 2014979*position requires... ...activity at San Jose CA office*Cisco ASIC Engineers develop and work with Next Generation... ...System Level Test Engineering Technical Lead to validate and ensure the quality of...Full timeTemporary workWork at officeLocal areaFlexible hours$100k
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance... .... We believe runtime systems are a core part of performance: they determine how hardware... ...interact at scale.How to make custom ASICs and co-processors work efficiently across...Permanent employment$191.4k - $281.4k
...the AI era, powering Cisco’s core Switching, Routing, and Wireless... ...and high-performance Silicon ASICs. Our silicon devices drive the... ...implements, and delivers industry-leading computing system products that... ...role as Hardware Engineering Technical Leader, you will be part of a...Full timeTemporary workWork at officeLocal areaFlexible hours$157.3k - $212.8k
...rapid integration of emergent technologies. We’re looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures... ...experiences, including our Conversations on Race and Ethnicity (CORE) and AmazeCon conferences. Amazon’s culture of inclusion is...Local areaWork from homeFlexible hours- ...of SystemVerilog/Verilog (for correlating failures to rtl if needed) Good to have (not critical): * Scan insertion * RTL DFT Verification capability (MBIST, clocking etc..) * DFT DRC (spyglass) \nCompany Description Who We Are: Quest Global delivers world...
$140k - $165k
About the RoleLead Oracle EBS technical design, development, integrations, and production support... ...into scalable technical solutions across core EBS processes — Order-to-Cash, Procure-to... ..., Payables, GL, Manufacturing, and RMA.• Lead requirement gathering, gap analysis, and...Work experience placement$175k - $250k
...previously thought impossible.We are seeking a seasoned and visionary Technical Lead, Network Software Development. This role involves strategic... ....Network and Device management - interfacing with hardware (ASIC/FPGA and other devices), switch management, configuration,...Remote workWorldwideFlexible hours$147k - $210k
...critical modernization projects, helping to simplify and re-architect core components of our platform.Collaborate with client teams and... ...:Master's degree or PhD in Computer Science or related technical fields.2 years of experience with data structures and algorithms...$184k - $287.5k
NVIDIA’s accelerated computing platform is foundational to modern HPC and AI. At the center of this platform are CUDA Core Libraries that enable developers to build fast, reliable, and scalable GPU-accelerated software. We are hiring a Senior Software Engineer to develop...Full time$207k - $300k
...leadership to decompose high-level business ambitions into scalable technical blueprints.Lead the design and implementation of autonomous, agentic... ...to production-grade scalability and reliability.Serve as a core technical stakeholder for the global Antigravity product...$171.6k - $245k
...you’ll join forces with expert ASIC design teams in the Central... ...Silicon Operations focusing on leading the design, development, and testing... ...state-of-the-art trends in DFT insertion techniques,... ...across many parts of Cisco's technical entities to provide bleeding-edge...Full timeTemporary workWork at officeLocal areaFlexible hours$157.5k - $225k
...these commitments to life through three core behaviors: ownership and collaboration, trust... ..., iterating, and shipping, balancing technical excellence with the need to deliver value... ...record of mentoring junior engineers and leading large-scale test automation or quality initiatives...Full timeWork at officeLocal area3 days per week$184k - $287.5k
NVIDIA’s accelerated computing platform is foundational to modern HPC and AI. At the center of this platform are CUDA Core Libraries that provide the algorithms, abstractions, and runtime capabilities needed to build fast, reliable, and scalable GPU-accelerated software...Full time
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