Senior Formal Verification Engineer
$204k - $259kDormont Manufacturing Co
Waymo is an autonomous driving technology company with the mission to be the world's most trusted driver. Since its start as the Google Self-Driving Car Project in 2009, Waymo has focused on building the Waymo Driver-The World's Most Experienced Driver-to improve access to mobility while saving thousands of lives now lost to traffic crashes. The Waymo Driver powers Waymo's fully autonomous ride-hail service and can also be applied to a range of vehicle platforms and product use cases. The Waymo Driver has provided over ten million rider-only trips, enabled by its experience autonomously driving over 100 million miles on public roads and tens of billions in simulation across 15+ U.S. states. Waymo's Compute Team is tasked with a critical and exciting mission: We deliver the compute platform responsible for running the fully autonomous vehicle's software stack. To achieve our mission, we architect and create high-performance custom silicon; we develop system-level compute architectures that push the boundaries of performance, power, and latency; and we collaborate closely with many other teammates to ensure we design and optimize hardware and software for maximum performance. We are a multidisciplinary team seeking curious and talented teammates to work on one of the world's highest performance automotive compute platforms. This role follows a hybrid work schedule and you will report to a Silicon Engineering Lead. You will: Define and drive formal strategy for first-pass silicon success. Own the formal verification sign-off approach across complex IP and SoC designs, utilizing advanced formal techniques (e.g., Bounded Model Checking, Datapath Validation, Connectivity, Sequential LEC, etc.) Architect robust and scalable FV environments. Develop and deploy reusable formal testbenches, methodology flows, and high-coverage SVA assertion suites for systemic deployment across multiple design blocks and projects Technical leadership & mentorship. Serve as the team's formal Subject Matter Expert, training and guiding logic designers and verification engineers to effectively incorporate formal methods into their workflows Strategic planning and test plan execution. Collaborate with Architecture and Design teams to translate complex system and IP specifications into comprehensive formal verification test plans Drive FV Infrastructure & Reporting. Maintain and enhance continuous integration, regression flows, and dashboarding to provide clear, actionable formal verification status and sign-off metrics to leadership Advanced bug-hunting and debugging. Apply state-of-the-art formal techniques (e.g., assume-guarantee, abstractions, reductions) to tackle and efficiently decompose the most challenging, intractable verification problems You have: BS/MS/PhD in CS/EE or related field, combined with 5+ years of hands-on formal verification experience on shipping silicon products Deep, expert-level proficiency with at least one major commercial formal verification platform (e.g., Cadence JasperGold, Synopsys VC Formal, Mentor Questa Formal) High level language proficiency in C++ and/or Python Ability to model complex designs in SystemVerilog and advanced SystemVerilog Assertions, including writing complex cut‑points and environment models for effective formal proof convergence Proven track record in applying advanced formal debug techniques for problem decomposition (e.g., clock domain crossings, abstractions, assume‑guarantee reasoning) Excellent verbal and written communication skills with the ability to influence cross‑functional teams (Design, Architecture, Software) and drive technical alignment We prefer: Informed of latest developments in formal verification research and industry practice, identify opportunities for Waymo's silicon development process Experience in formally proving correctness of arithmetic units such as floating point adders and multipliers Knowledge/experience working with NOCs and networking topologies, protocols (Eg. AXI/AMBA) Understand basic principles of cache coherency Experience with high-performance designs Salary Range The expected base salary range for this full‑time position across US locations is listed below. Actual starting pay will be based on job‑related factors, including exact work location, experience, relevant training and education, and skill level. Your recruiter can share more about the specific salary range for the role location or, if the role can be performed remote, the specific salary range for your preferred location, during the hiring process. Waymo employees are also eligible to participate in Waymo's discretionary annual bonus program, equity incentive plan, and generous Company benefits program, subject to eligibility requirements.
$204,000 — $259,000 USD
#J-18808-Ljbffr Dormont Manufacturing Co- NVIDIA Gruppe is seeking a Senior Formal Verification Engineer for GPU Kernels, focused on creating verification tools that ensure correct behavior in various environments. This role involves designing verification tools, integrating AI into workflows, and participating...Senior
$184k - $287.5k
NVIDIA Corporation is seeking a Senior Formal Verification Engineer for GPU Kernels in Santa Clara, CA. In this role, you will develop and deliver verification tools for GPU kernels, integrating AI into verification workflows. The ideal candidate has an MS or PhD in Computer...Senior$184k - $287.5k
Overview We are looking for a Senior Formal Verification Engineer for GPU Kernels. NVIDIA's Deep Learning Safety Team is hiring engineers to build verification tools that prove GPU kernels behave correctly, enabling their deployment in a wide range of environments, including...SeniorWork experience placement$184k - $287.5k
Senior Formal Verification Engineer, GPU Kernels page is loaded## Senior Formal Verification Engineer, GPU Kernelslocations: US, CA, Santa Claratime type: Full timeposted on: Posted Yesterdayjob requisition id: JR2016917We are now looking for a Senior Formal Verification...SeniorWork experience placement$132k - $189k
A leading technology company is seeking an ASIC Formal Verification Engineer in Sunnyvale, CA. This role involves shaping the future of AI/ML hardware with a focus on TPU technology. Candidates should have a Bachelor's degree in Electrical Engineering or a related field...Suggested- ...Hi, Title: Lead / Senior Verification engineer Location: San Jose, CA / Santa Clara, CA Duration: 6+ Months Rate: $Open Skills: UVM and System Verilog Requirement: . • 5+ or more years of proven experience on ASIC / SoC...Senior
$132k - $189k
...Sunnyvale, CA, USA Apply Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related... ...equivalent practical experience. 4 years of experience with formal and design verification. Experience with SystemVerilog or Verilog. Experience...Full timeWorldwide$168k - $264.5k
...NVIDIA is actively searching for talented Senior Verification Engineers to ensure the integrity and excellence of our industry-leading SoCs and GPUs... ...checks (SVA), code coverage, functional coverage, and formal test plan documentation. ~ Strong debugging and analytical...Senior- ...patients suffering from chronic sacroiliac joint pain. Senior Systems Verification Engineer Redwood City, CA Position Summary: The Senior... ...are being performed; Complete regression, dry, and formal verification runs for multiple releases at appropriate...Senior
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...link Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science... ...experience. 8 years of experience with design verification. Experience with SystemVerilog.... ...environments using SystemVerilog and UVM, or formally verify designs with SVA and industry...SeniorFull timeWorldwide$181.1k - $318.4k
Apple Inc. is looking for an experienced AI/ML Engineer in Cupertino, California, to develop AI-powered systems that enhance formal verification on Apple Silicon. Candidates should have substantial experience in AI/ML application development, especially with Large Language...- Synopsys, Inc. is looking for an experienced Physical Verification Specialist based in Sunnyvale, California. In this role, you'll engage with customers to understand and solve their verification challenges while utilizing your expertise in EDA tools such as IC Validator...Senior
- Expertise in ASIC/SoC verification using HVLs. Knowledge of networking protocols will be an addedadvantage. Expertise in SystemVerilog, System C,Verification Methodologies such as OVM,UVM,etc. Should have worked on at least one full-chip or module-level verification using...Senior
- A self-driving technology company is seeking a Senior/Staff Software Engineer specialized in behavior verification. The role involves developing metrics to evaluate the driving behavior of autonomous vehicles, with strong requirements in Python or C++. You will collaborate...Senior
$170k - $230k
United States Digital Space LLC is seeking a Full Chip Physical Verification Engineer to develop next-generation silicon for global deployments. The role involves executing full-chip signoff tasks and collaborating with cross-disciplinary teams. Ideal candidates will have...Senior$170k - $240k
United States Digital Space LLC in Sunnyvale, California is seeking a Sr. ASIC Design Verification Engineer to develop next-generation ASICs for space deployment. You will be part of a dynamic team driving cutting-edge technology with the goal of enabling human life on...Senior- Apple Inc. is seeking a Wireless MAC Design Verification Engineer in Sunnyvale, California, to join the Wireless Connectivity Silicon team. In this role, you will ensure high-quality and reliable products using innovative wireless technologies. The ideal candidate has extensive...Senior
- Google Inc. is looking for a Verification Engineer specializing in Digital Signal Processing in Sunnyvale, CA. The candidate will shape the future of AI/ML hardware acceleration, working on cutting-edge TPU technology and verifying complex digital designs focusing on TPU...Senior
$136k - $218.5k
...NVIDIA is seeking a hardworking Senior ASIC Design Verification Engineer to help drive sign-off strategies for world's leading GPUs and SoCs. This position... ...VCS-XA or equivalent tools, Gate Level Simulation or Formal Equivalence domains. Strong interpersonal skills and...SeniorWork experience placementRemote work- ...Senior Design Verification Engineer Location: On-site in Santa Clara, CA Job Type: Full-Time Client is an innovative high-tech startup delivering... ...random testing, assertion-based verification, formal analysis, and functional verification. Perform RTL code...SeniorFull time
- ...scalable coherency fabric (SCF). Use advanced verification methods, including sophisticated... ...innovative verification methodologies, and formal verification techniques. Analyze and... ...team. Track record of mentoring junior engineers and interns (plus). Strong background in...SeniorNight shift
$164.47k - $311.89k
...Job Description: About the Role Intel is seeking a Senior Design Verification Engineer for the Silicon Chassis team. In this role, you will own... ...across teams Drive convergence of simulation and formal verification into unified bug hunting and coverage closure...SeniorInternshipLocal areaImmediate startShift work$136k - $218.5k
Senior Verification Engineer We are seeking a Senior Verification Engineer to join our front‐end multi‑media IP team responsible for varied multi... ..., IP architects and other verification engineers to formalize product features. Verify IPs using System Verilog and UVM...Senior$163k - $237k
...California, for a pivotal role in developing innovative custom silicon solutions. The successful candidate will leverage expertise in verification methodologies and languages to enhance the performance and integration of products recognized globally. This role not only...Senior$70k
DensityAI in Mountain View, California, is looking for engineers to work across various hardware teams. Candidates must have at least... ...flow. This role involves contributions to RTL design, design verification, and physical design among other tasks. The compensation for...Senior- ...Senior Requirements and Verification Systems Engineer | Lockheed Martin Space is a critical domain, connecting our technologies, our security and our humanity. While others view space as a destination, we see it as a realm of possibilities, where we can do more we can...Senior
- Google Inc. in Sunnyvale, CA, seeks a Senior Engineer to shape the future of AI/ML hardware acceleration. You will lead projects enhancing TPU technology that powers Google's demanding applications, aiming to deliver innovative custom silicon solutions. The ideal candidate...Senior
$250k - $300k
Cerebras Systems, Inc. in Sunnyvale, CA, is looking for a Design Verification Engineer with over 10 years of experience. You will collaborate on high-quality designs and develop verification strategies. A successful candidate will possess deep knowledge of SystemVerilog...Senior$170k - $230k
SPACE EXPLORATION TECHNOLOGIES CORP in Sunnyvale, CA is seeking a Sr. Full Chip Physical Verification Engineer to drive cutting-edge silicon integration for space technologies. Responsibilities include executing full-chip DRC, LVS, and ESD signoff, while using tools like...Senior- ...Educate Your Ego: Selflessly collaborate towards our shared purpose. About the role We’re looking for highly experienced Design Verification Engineers (DVE) in the United States. The DVE is responsible for developing and verifying silicon IP. The DVE should have hands‑on...Senior
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