Design Verification Lead - PCIe/CXL IP, AI-Driven QA
Advanced Micro Devices Inc
AMD in San Jose, CA is seeking a Design Verification Engineer Lead to advance FPGA/ASIC IP verification. You will work across architecture, IP design, physical design and firmware teams to ensure first-pass silicon success for high-speed IP solutions. You bring deep UVM-based verification expertise, SystemVerilog and Python scripting, plus leadership experience mentoring distributed teams. This role emphasizes collaboration and technical excellence. #J-18808-Ljbffr AMD
Vacancy posted 23 hours ago
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