Average salary: $226,999 /yearly
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$256k - $278k
...Share ASIC Design Verification Manager, TPU Compute corporate_fare Google place Sunnyvale, CA, USA info_outline X In most instances, this position requires in-person interviews as part of the hiring process. ~ Bachelor's degree in Electrical Engineering, Computer...SuggestedWorldwideGoogle
Sunnyvale, CA4 days ago- ## ASIC Design ManagerBoulder, CO, United StatesFind out how well you match with this jobJob ID: 10747**ASIC Design Manager****Location:**Louisville, CO or Beaverton, OR**Organization:**ASIC Development Group, Tektronix# OverviewAt Tektronix, we believe innovation starts...SuggestedPermanent employmentFor contractorsLocal area
Ralliant
Louisville, CO3 days ago $208k - $280.8k
...Lab126 is an inventive research and development company that designs and engineers high-profile consumer electronics. Lab126... ...Fire TV and Amazon Echo. What will you help us create? As an ASIC Design Manager, you will be part of an advanced development team that is creating...SuggestedFlexible hoursAmazon
Boise, ID5 days ago$206.2k - $356.4k
...to join a team transforming hardware technology? We are searching for a dedicated engineering manager to join our exciting team of problem solvers.DescriptionAs an ASIC Design Manager, your responsibilities span various aspects of SOC design:- Manage a team of engineers...SuggestedRelocationApple
Cupertino, CA1 day ago- ...Solutions team is seeking a talented, strategic leader with a passion for microchips, project management and people. The successful candidate will have a background in SOC, ASIC or FPGA development or verification and experience in leading or managing SOC/ASIC/FPGA...Suggested
Lockheed Martin Corporation
Denver, CO4 days ago - ...switches. This is the first silicon and system designed from the ground up for AI and the... ...Position Overview We are seeking a hands-on ASIC Design Verification Lead to own... ...verification work. This is not a people-manager-only role. The ideal candidate is a highly...Suggested
Eridu Corporation
Saratoga, CA9 hours ago $186.9k - $267.7k
...long track record of building complex and high-performance Silicon ASICs. Our silicon devices drive the world’s most complex networks and... ...ASIC team with experts in all aspects of advanced IC package design and heterogeneous system integration. Our substrates use the latest...SuggestedFull timeTemporary workWork at officeLocal areaRemote workFlexible hoursCisco Systems, Inc
San Jose, CA4 days ago- ...Tektronix seeks an ASIC Design Manager to lead our digital ASIC design and realization team across Boulder/CO, Louisville/CO or Beaverton/OR. You will own the end-to-end digital ASIC flow, including microarchitecture, RTL development, IP selection, synthesis, floorplanning...Suggested
Tektronix
Boulder, CO1 day ago - ...Niobium is hiring an experienced ASIC Physical Design Lead to drive end-to-end implementation of complex SoCs. You will partner with Architecture, RTL, Verification, DFT and Power teams to deliver high-performance, power-efficient silicon on cutting-edge nodes. Located...SuggestedRemote work
Niobium Services LLC
Salem, OR9 hours ago - ...Google Sunnyvale, CA, USA is seeking a Power Design Manager to lead a team of power design engineers focused on ASIC power architecture and optimization for TPU systems. You will own complex projects from concept through execution, driving low-power RTL designs and cross...Suggested
$192.3k - $307.6k
...better business results.Opportunity OverviewTeradyne is seeking an experienced Physical Design Lead to join our Silicon Technology Engineering (STE) organization within the Digital ASIC Group. This team develops advanced-node, large-scale mixed-signal ASICs that are...SuggestedFlexible hoursUniversal Robots
North Reading, MA3 days ago$192k - $278k
...Share ASIC Design Verification Manager, Google Cloud corporate_fare Google place Sunnyvale, CA, USA X In most instances, this position requires in-person interviews as part of the hiring process. ~ Bachelor's degree in Electrical Engineering, Computer...SuggestedWorldwideGoogle LLC
Sunnyvale, CA2 days ago- ...positions in Austin, TX. You will collaborate across teams on advanced packaging, PCB design, and power delivery while contributing to the design and validation of AWS next-generation ML ASICs. The role requires expertise in signal and power integrity, with hands-on...Suggested
- Draper in Cambridge, MA seeks a Senior Analog/Mixed Signal ASIC Design Engineer to join the Silicon Architecture group. You will design and verify ICs from architectural concepts through to test and delivery, collaborating with Analog and Digital teams and taking chip-lead...Suggested
- Hader Solutions in Austin, TX seeks a Senior ASIC Physical Design Engineer to lead physical implementation of assigned SoC partitions, driving... ...to resolve implementation and signoff issues. You will manage EM/IR analysis, PDN planning and verification, oversee LEC and...Suggested
- ...Overview Lead global ASIC Physical Design teams responsible for delivering complex digital and mixed-signal ASICs from RTL through GDSII. This... ...successful silicon delivery. Responsibilities Lead and manage physical design teams across the United States, India, and Italy...
Fidelis Companies
San Francisco, CA1 day ago $216.2k - $394k
...ASIC Design Engineering Lead - SoC IP DMA In this highly visible, hands-on role, you will lead a team of engineers at the center of... ...Apple's SOC IP DMA design effort. Balancing equal parts people management and technical leadership, you will guide your team through...WorldwideRelocationApple, Inc.
Sunnyvale, CA9 hours ago- ...Teradyne North Reading is seeking an ASIC and Logic Design Engineering Manager to lead a 4–6 person FPGA/digital IP team. You will design and verify FPGA/ASIC components, collaborate with multiple engineering disciplines, and drive timely, high-quality deliverables for...
Teradyne
Reading, MA4 days ago $155.5k - $248.7k
Title: ASIC and Logic Design Engineering Manager Location: North Reading, MA (Hybrid Schedule 3 days per week onsite) Target Start Date: ASAP Type: Direct Hire PayRate / Salary (Ranges OK): $155,500-$248,700 annually + discretionary bonus Position Overview We are seeking...Full timeContract workFor contractorsImmediate startRemote workFlexible hours3 days per week- ...Teradyne in North Reading, MA, seeks an ASIC and Logic Design Engineering Manager to lead a 4–6 person FPGA/ASIC team for Compute Test products. You will oversee 2–3 FPGA/digital IP projects, collaborate across disciplines, and ensure timely deliverables in budget....
Teradyne
North Reading, MA4 days ago $134.38k - $230.13k
...technical leadership for teams across Coherent global sites.Plan & manage evaluation of prototype silicon in close collaboration with the... ...of related professional experience.Hands-on experience with design of RFIC's 20GHz, 100GHz + is a plus.Familiar with wired or optical...Coherent
Santa Clara, CA4 days ago$190k - $245k
...SPACE EXPLORATION TECHNOLOGIES CORP in Hawthorne, CA is seeking a Manager of ASIC Design Engineering to lead the design team for Starshield projects. This role requires a Bachelor's degree in electrical engineering or a related field along with over 5 years of experience...SPACE EXPLORATION TECHNOLOGIES CORP
Hawthorne, CA4 days ago$155.5k - $248.7k
...Select how often (in days) to receive an alert: ASIC and Logic Design Engineering Manager (Compute Test, North Reading) Date: Aug 28, 2026 Location: North Reading, MA, US We are the global test and automation specialists, powering next-generation technologies...Contract workRemote workFlexible hoursTeradyne
North Reading, MA9 hours ago$220k - $250k
...in pursuit of ambitious technical goals. The team is seeking an experienced RTL Design Tech Lead to drive microarchitecture, RTL development, and technical execution across complex ASIC/SoC programs from architecture through tapeout. This role combines deep hands-on...Work from homeMRL Consulting Group
California9 hours ago- ...before you apply.Job Description:Broadcom is seeking an experienced IC Package Design Project Manager to lead a team of engineers designing complex flip-chip-BGA packages for industry-leading ASICs with high-speed SerDes and very-high-power-delivery needs. You will be part...Full timeWork at officeLocal areaWorldwide
Broadcom
Fort Collins, CO5 days ago $192k - $278k
...Physical Design Technical Lead, ASIC, TPU Share Physical Design Technical Lead, ASIC, TPU corporate_fare Google place Sunnyvale, CA, USA... ...and 2.5D/3D packaging. Technical leadership experience managing execution schedules, mitigating risks, and driving cross-functional...WorldwideGoogle
Sunnyvale, CA9 hours ago$220k - $250k
...towards our shared purpose. About the Role We're looking for a seasoned RTL Design Tech Lead to drive micro-architecture, RTL development, and technical execution for complex ASIC/SoC programs. This role combines deep hands‑on design expertise with technical leadership...Work from homeBolt Graphics
Sunnyvale, CA1 day ago$192k - $278k
...equivalent practical experience. ~10 years of experience in physical design, including custom structured datapath implementation. ~... ...nodes (including FinFET and Gate-All-Around architectures), managing the physical density and routing congestion typical of custom datapaths...WorldwideGoogle
Sunnyvale, CA9 hours ago- ...Cisco Systems, Inc. is seeking a senior Physical Design/Fullchip architect for its Common Hardware Group in the U.S. This role focuses... ...design workflows. You will drive RTL-to-GDSII implementations, manage IP integration, and ensure robust signoff methodologies with foundry...
Cisco
San Jose, CA3 days ago - ..., and robust test access within Cisco’s scalable silicon architecture. Join a global, collaborative team that drives performance, security, and innovation across Cisco’s silicon platforms, working closely with RTL and backend design groups to deliver #J-18808-Ljbffr...
Cisco
San Jose, CA1 day ago
