Senior ASIC Front-End Design Lead
Apple Inc.
Apple Inc. in Sunnyvale is seeking an ASIC Design Engineering Lead for the SoC IP DMA effort. You will split time between leading a focused team and contributing as a hands-on technical contributor to microarchitecture, RTL delivery, and debug. You will mentor engineers, drive micro-architectural decisions, and build design infrastructure with automation and AI support, while partnering with cross-functional teams to deliver silicon-ready designs that power products used by millions. #J-18808-Ljbffr Apple Inc.
$216.2k - $394k
...ASIC Design Engineering Lead - SoC IP DMA In this highly visible, hands-on role, you will lead a team of engineers at the center of Apple's... ...technical leadership, you will guide your team through the full front-end design cycle, including microarchitecture, RTL delivery,...Front endWorldwideRelocation- ...Tensordyne, a leading AI system solution company, specializes in high-performance, low-power generative AI inference systems... ...technological advancements. Responsibilities: Lead ASIC front-end physical design and engineering workflow development for generative AI...SeniorFront endFull time
- ...Engineering team is looking for a highly skilled and motivated ASIC Design Engineer to join our dynamic group. In this role, you will... ...and FPGA prototyping. Hands on experience in all aspects of front‑end chip development process (e.g., CDC/RDC, LINT, LEC, etc.)....SeniorFront end
- NVIDIA Corporation is seeking a Senior Manager of ASIC Chip Engineering in Santa Clara. You will... ...to production, coordinating IP design, DFT, physical design, and emulation... ...managing an SoC, and deep knowledge of front- and back-end flows. Excellent communication and data...SeniorFront end
- Tensordyne, a leading AI system solution company, seeks an experienced ASIC engineer to lead frontend physical design for generative AI inference in Sunnyvale, CA. You will guide optimization... ...experience, and proven frontend/back-end design expertise with clock trees and...SeniorFront end
- ...Alto Networks in Santa Clara, CA, is seeking an experienced ASIC design lead to own frontend design from specification through silicon bring... ..., power, and schedule goals. The role requires 10+ years' front-end ASIC design ownership, expert SystemVerilog RTL skills, and...SeniorFront end
- NVIDIA Corporation in Santa Clara, CA seeks a Senior ASIC Design Engineer for Clocks IP to architect clock domains for GPUs/CPUs, collaborating with front-end, floorplanning and back-end teams to meet timing, PPA and DFT requirements. Role involves implementing clocking...SeniorFront end
- Cerebras Systems, Sunnyvale, CA, is seeking a senior ASIC designer to drive RTL development, manage external vendors, and collaborate across... ..., physical design and system teams. The role emphasizes front-end integration, high-speed interfaces, and silicon bring-up, with...SeniorFront end
- NVIDIA is looking for a Senior ASIC Design Engineer based in Santa Clara, California. You will be a key member of the GPU Design team, implementing high-performance, area-efficient RTL for leading SoCs and GPUs. The ideal candidate has a Bachelor's degree in Electrical...Senior
$184k - $287.5k
NVIDIA is seeking elite ASIC Infrastructure engineers to deliver the tooling and... ...environment that enables DV and RTL Design for the world's leading GPUs. This position offers the opportunity... ...and extensibility of the GPU front end build flow Keep the GPU Continuous Integration...SeniorFront endFull timeWork experience placementWork at officeWorldwide$232k - $368k
## Senior Manager, ASIC Chip EngineeringApplylocations: US, CA, Santa Claratime type: Full timeposted... ...as coordinate the activities of IP design, integration, DFT, physical design,... ...Markets, competition, and architecture + Front-end flows including micro-architecture,...SeniorFront end- ...Mountain View, CA, seeks a Principal Digital & Mixed-Signal IC Design Engineer to own control, interface, calibration, monitoring, and... ...-signal blocks that configure and monitor multi-channel RF front ends, from serial interfaces and register maps through on-chip sensors...SeniorFront end
$200k - $290k
...architecture allows Cerebras to deliver industry-leading training and inference speeds; over 10... ...-speed inference.About The Role:As a senior front-end design engineer, you will be a key part of... ...a plus.Experience managing external ASIC vendor through product development...SeniorFront endRemote work$156.4k - $253k
...Job Summary About the Role Join our ASIC team and help deliver the digital logic... ...firewall platforms. You will own module design from specification through silicon bring‑... ...military experience preferred). ~10+ years' front-end ASIC design ownership, shipping 2+ chips...SeniorFront endFull timeWork at office- Tensordyne, a Sunnyvale-based AI system solutions company, is seeking a senior ASIC STA lead to drive frontend physical design and timing closure across full-chip and block-level workstreams. You will collaborate with a global team, develop scalable STA workflows, and...SeniorFront end
$190k - $280k
...of the system. Logos is designed to extend cloud and... ...SDR) technology. As a Senior FPGA Modem Engineer, you... ...based modem solutions for end-to-end wireless... ...Equivalent experience in ASIC modem design will also... ...understanding of Digital Front End (DFE) architectures...SeniorFront endWorldwide- .... THE ROLE: You will contribute to the ASIC (chip) design for high-performance network chips: AINIC... ...-edge designs. As a member of the front-end design/integration team, you will work... ...:A successful candidate will work with senior silicon design engineers. The candidate...SeniorFront endNight shift
- Palo Alto Networks, Inc. is seeking an experienced ASIC design professional to own frontend design from spec to silicon bring-up for our next‑gen firewall platforms. You will work with verification and physical‑design teams to hit aggressive performance, power, and schedule...SeniorFront end
- ...powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions... .... You Are You bring extensive ASIC digital design experience with a track... ...responsible for microarchitecture and front-end design of LPDDR PHY IP. This core product...SeniorFront endWorldwide
$127.63k - $191.2k
...a place to thrive, learn, and lead. Your Team, Your ImpactAs a key... ...next-generation Agentic design verification workflow and its... ...generation Agentic AI workflows for Front-End Engineering. This role will focus... ...deploy agentic workflows for ASIC verification activities....SeniorFront endPermanent employmentInternshipWork from home$192k - $278k
Lead the physical design implementation and strategy for high-performance silicon for critical, high-complexity subchips.Manage the full design... ...floorplanning, place and route, and timing closure for high-speed ASICs across various process nodes.Experience in Python, Tcl, or...Worldwide- ...Sr. ASIC Verification Engineer Sunnyvale, CA Artificial... ...that specializes in the design of industry-leading high-performance, low-power... ...About the Role As a senior member of Tensordyne's ASIC... ...and methodologies for the front-end ASIC flow. Ensure the...SeniorFront endWork at officeRemote workFlexible hours
- ...solution company that specializes in the design of industry-leading high-performance, low-power AI... ...role: As a Sr. member of Tensordyne’s ASIC team, you will be responsible for the... ...development process with proficiency in front-end tools and methodologies. Familiarity...SeniorFront endWork at officeRemote workFlexible hours
$200k - $250k
...Principal Analog/Mixed-Signal ASIC Engineer - Silicon... .../Mixed-Signal ASIC Design, High-Speed SerDes, Transimpedance... ...speed data wirelessly. Lead the charge in bringing... ...2) High-speed designs: Front-end circuits for optical... ...work effectively with senior external partners.Hands...Front endRemote work- Apple Inc. in Santa Clara, CA, is seeking a Circuit Design Engineering Lead to spearhead a custom circuits team within the SOC design effort. You... ...teams, and guide PDV/PDK migrations to deliver cutting-edge ASICs. You will mentor a small team, influence design choices, and...
- Google LLC in Sunnyvale, CA is seeking a skilled hardware design engineer to drive the physical design of high-performance ASIC sub-chips for TPU architectures, from RTL to GDSII, with focus on timing, power, and area. Join the AI and Infrastructure team to shape cutting...
$192k - $278k
...practical experience. 10 years of experience in physical design, including leading full-chip or sub-chip implementation such as RTL2GDSII and... ...floorplanning, place and route, and timing closure for high-speed ASICs across various process nodes. Experience in Python, Tcl,...Worldwide$192k - $278k
Lead the functional verification team for significant portions of... ...working with cross-functional design, architecture and power teams... ...within AI/ML-driven systems. As an ASIC Design Verification Manager... ...will collaborate closely with front-end design, architecture, and...Front endWorldwide- ...Senior Analog & Mixed-Signal IC Designer Role Overview We are seeking a highly experienced... ...transceivers, RFIC front-ends, and precision data converters... ...contributor or technical lead role focused on next-... ...module ICs (TOSA/ROSA driver ASICs, coherent DSP interfaces)...SeniorFront end
- Synopsys, Inc. in Sunnyvale, CA seeks a senior architect to lead design teams through full ASIC/FPGA cycles, from specification to GDSII handoff. You will partition complex SOCs, balance performance and power, and drive RTL using SystemVerilog while collaborating with verification...Senior
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