Senior DFT & ATPG Engineer for SoC/ASIC
L&T Technology Services
L&T Technology Services Limited is seeking an experienced engineer with over 5 years of hands-on expertise in DFT and ATPG for SoC or ASIC designs. The candidate should have a strong understanding of DFT fundamentals, including controllability, observability, and scan-based testing. An excellent grasp of digital design and proficiency in industry standard DFT/ATPG EDA tools is essential. Strong analytical and communication skills are key for success in this fast-paced semiconductor environment. #J-18808-Ljbffr
- ...professional to join their team in Santa Clara, California. The ideal candidate will have over 5 years of hands-on experience in DFT and ATPG for SoC or ASIC designs, coupled with strong analytical and problem-solving skills. Responsibilities include working on cutting-edge...Senior
$142.2k - $213.4k
A leading tech company is seeking a DFT Engineer to work closely with chip architects and designers on mixed signal and digital VLSI designs... .... Ideal candidates will have extensive experience in digital ASIC design, proficiency in Verilog or VHDL, and expertise with Mentor...Senior$65k - $98k
UST is looking for a DFT Engineer - Associate III to work on Semiconductor Product Validation in Santa Clara... ...have over 5 years of experience in DFT for ASIC/SoC development, a strong understanding of scan design and ATPG, and hands-on experience with tools like Synopsys...Suggested$135k - $160k
...goal of enabling human life on Mars. SR. ASIC DFT ENGINEER (SILICON ENGINEERING) At SpaceX we’re... ...run Automatic Test Pattern Generation (ATPG) tools and methodologies, including generating... ..., and yield optimization on complex SoCs or ASICs. Hands‑on experience with Automated...SeniorPermanent employmentTemporary workWorldwideWeekend work- ...SpaceX is seeking a motivated Sr. ASIC DFT Engineer for their team in Sunnyvale, California. The engineer will work on developing next-generation ASICs for deployment in space and ground infrastructures. Responsibilities include optimizing DFT architectures and collaborating...Senior
- ...role focusing on timing analysis and closure for DFT logic across its chips, including GPUs, CPUs, and SoCs. The ideal candidate has a strong background in Static... ...5 years of experience in Electrical or Computer Engineering. You will collaborate across teams to drive...Senior
$136k - $218.5k
...Responsibilities Drive timing analysis and closure for DFT logic on all Nvidia chips (GPUs/CPUs/DPUs/LPUs/SoCs) at all hierarchical levels (block/cluster/full-... ...equivalent experience) in Electrical or Computer Engineering with 5+ years’ experience or MS (or equivalent...Senior$105.65k - $200.34k
Intel Corporation is seeking a DFT ATPG engineer in Santa Clara, California. The role involves developing DFT logic design, ensuring high test coverage, and collaborating with cross-functional teams to integrate DFT features. Minimum qualifications include a BS in a relevant...Senior- SpaceX is seeking a Sr. ASIC DFT Engineer to develop advanced ASICs for space and ground infrastructures. This role involves optimizing DFT architectures and collaborating with various engineering teams to enhance the Starlink network's capabilities. Ideal candidates will...Senior
- ...You Can Expect We are looking for a Senior Staff DFT Engineer with hands-on experience in scan-based... ...coverage closure, and DFT signoff for complex SoC designs. Key Responsibilities... ...teams Generate, simulate, and debug ATPG scan patterns; analyze results and drive...SeniorShift work
$145k - $286k
1000 Micron Technology, Inc. is hiring a Staff ASIC Design Verification Engineer in San Jose, California. The role involves defining and improving design verification environments for complex SoC components, alongside building test benches and collaborating with various...Senior- A leading technology company based in Santa Clara, California is looking for an experienced ASIC Design Engineer to join their Integrated Wireless Technology team. As a key contributor, you will develop micro-architecture specifications and design low-power solutions within...Senior
$112.2k - $242k
A leading tech company in Mountain View is seeking a Design Verification Engineer to architect verification environments for ASIC SoCs. The ideal candidate will have a minimum of 8 years of experience and a deep knowledge of verification processes. Responsibilities include...SeniorFull time$237k - $296k
...high-caliber Sr. Staff Design Verification Engineer to join our ADAS and Inference Silicon... ...functional verification of next-generation SoCs, ensuring bit-accurate integrity and high... ..., preferably with a background in ASIC design verification, and deep hardware knowledge...Senior$136k - $218.5k
...AI and accelerated computing, we seek a Senior LPU ASIC Engineer to contribute to our outstanding... ...design for large-scale, high-performance SoCs at advanced process nodes. Full-Flow Execution... ...silicon integrity and timing closure. DFT & Block-Level Integration: Skilled in...SeniorFull time$105.65k - $200.34k
...Job Details Job Description: The DFT ATPG engineer develops the logic design, register transfer level (RTL) coding, simulation, and provides... ...architecture and microarchitecture features of the block, subsystem, and SoC under DFT being designed (including TAP, SCAN, MBIST, BSCAN,...Local areaShift work$136k - $218.5k
...processes for NVIDIA’s GPUs, CPUs, LPUs, and SoCs at block level, cluster level, and full... ...experience) in Electrical or Computer Engineering with 5 years’ experience or MS (or equivalent... ...checking/FV. Understanding of DFT logic and experience with DFT timing closure...Senior- ...A leading technology company based in San Jose, California is seeking an experienced design engineer to handle the physical implementation of SOC projects. This position requires a minimum of 10 years of industry experience with a strong background in partition level P...Senior
$225k
...Frey Consulting Group is seeking 4 experienced ASIC/VLSI Engineers for permanent, full-time, onsite roles in Silicon Valley. The successful candidates will support advanced semiconductor and AI/networking programs with tier-1 clients. Key requirements include 8+ years...SeniorPermanent employmentFull time$120k - $220k
...quality of life. We are seeking a Senior Design-for-Test (DFT) Engineer to join our SoC design team. In this role, you... ...standard DFT tools • Own the full ATPG lifecycle: verification, coverage... ...for-Test (DFT) for complex digital ASICs or SoCs • Hands-on experience...SeniorFull timeWork at officeImmediate startVisa sponsorshipNight shift$110k - $300k
...A leading technology company in San Jose, California, is looking for a skilled engineer specializing in SoC design verification. The ideal candidate should hold an MS or PhD in Electrical Engineering with extensive experience in verification methodologies. Responsibilities...Senior$136k - $218.5k
...NVIDIA Gruppe is seeking a Senior SOC Design Engineer to join our SOC Design team in Santa Clara, California. You will integrate advanced ASICs, develop methodologies for SOC creation, and streamline design processes. A minimum of 3 years of hands-on chip design experience...Senior- ...NVIDIA Corporation is hiring a Senior ASIC Verification Engineer in Santa Clara, California. This position involves verifying designs and implementations of cutting-edge SoCs and GPUs, along with defining verification strategies and collaborating with ASIC designers. Candidates...Senior
$185k - $250k
A Silicon Valley-based hardware startup is looking for a highly experienced Post-Silicon ASIC Validation Engineer. The role involves leading validation of complex networking ASICs and chiplet-based architectures. The ideal candidate has strong expertise in post-silicon...Senior- ...Title: DFT Engineer Location: Santa Clara, CA Full Time Job Detail:- Required Skills & Qualifications ~5+ years of hands-on experience in DFT and ATPG for SoC or ASIC designs ~ Strong understanding of DFT fundamentals including controllability, observability...Full time
- ...excellent match for an urgent Requirement “DFT Engineer” Role with our Client is Wipro and... ...with hands-on experience in Scan, ATPG, MBIST, or Boundary Scan Key Responsibilities... ...end-to-end DFT ownership across complex ASIC/SoC designs. Thanks! Vishal Tyagi...Full time
- ...Silicon One development organization as an ASIC Implementation Engineer in San Jose, CA with a primary focus... ...chip architecture and drive DFT requirements early in the design cycle... ...boundary scan. Good experience with ATPG and EDA tools like TestMax, Tetramax,...Work experience placement
$136k - $218.5k
About NVIDIA At NVIDIA, we push the boundaries of computing innovation. Our ASIC Verification Engineers focus on developing the world’s top SoCs and GPUs. Joining us as a Senior ASIC Verification Engineer - GPU means working on modern technology powering consumer graphics...Senior$136k - $218.5k
Senior ASIC Verification Engineer page is loaded## Senior ASIC Verification Engineerlocations: US, CA, Santa Claratime type: Full timeposted on: Posted... ...the design and implementation of the world’s leading SoC's and GPU's. This position offers the opportunity to have...Senior- A pioneering technology firm in Sunnyvale, CA is seeking an ASIC Design Verification Engineer to ensure the functional correctness of high-speed low-power digital integrated circuits. The ideal candidate will have significant experience in ASIC verification, particularly...Senior
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