Senior DFT Engineer: Scan Insertion & ATPG Expert
VGAI Solutions
VGAI Solutions seeks a Senior DFT Engineer to lead scan insertion and ATPG validation efforts within a 12‑month engagement. The role requires 8–12 years of hands-on DFT experience and expertise with industry tools such as Mentor Tessent and Synopsys DFT Compiler. You will collaborate with design and verification teams, implement DFT methodologies, and drive testability from insertion through sign-off in an ASIC/SoC flow. #J-18808-Ljbffr VGAI Solutions
Vacancy posted 2 days ago
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