Sign up to access all features of our service.
  • Job search
  • Favorites
  • Create a CV
    New
  • Salaries
  • Subscriptions

ASIC Design Verification Engineer

Somi AI

Waymo is an autonomous driving technology company with the mission to be the world's most trusted driver. Since its start as the Google Self-Driving Car Project in 2009, Waymo has focused on building the Waymo Driver—The World's Most Experienced Driver— to improve access to mobility while saving thousands of lives now lost to traffic crashes. The Waymo Driver powers Waymo’s fully autonomous ride-hail service and can also be applied to a range of vehicle platforms and product use cases. The Waymo Driver has provided over ten million rider‑only trips, enabled by its experience autonomously driving over 100 million miles on public roads and tens of billions in simulation across 15+ U.S. states. Waymo's Compute Team is tasked with a critical and exciting mission: We deliver the compute platform responsible for running the fully autonomous vehicle’s software stack. To achieve our mission, we architect and create high-performance custom silicon; we develop system‑level compute architectures that push the boundaries of performance, power, and latency; and we collaborate closely with many other teammates to ensure we design and optimize hardware and software for maximum performance. We are a multidisciplinary team seeking curious and talented teammates to work on one of the world’s highest performance automotive compute platforms. This role follows a hybrid work schedule and you will report to a Silicon Engineering Lead. Responsibilities Partner with design and architecture teams to translate hardware specifications into comprehensive, scalable verification plans Drive the development of testbenches, reference models, and stimulus to validate mission‑critical functionality and performance Architect and enhance verification environments, contributing to shared tools and reusable methodologies across the organization Evaluate, integrate, and verify third‑party Verification IP (VIP) to accelerate the development cycle Define and analyze coverage metrics (functional and code) to ensure design readiness and closure Advocate and establish verification best‑practices Required Qualifications 3+ years of experience building and maintaining complex testbenches using UVM/SystemVerilog Proven track record with constrained‑random generation, functional coverage, and SVA (SystemVerilog Assertions) Deep understanding of complex digital logic and the ability to debug intricate hardware/software interactions Proficiency in Python for developing scalable automation frameworks, data analysis tools, and regression management suites Excellent verbal and written communication skills, ability to collaborate with cross‑functional teams Strong analytical skills in root‑causing failures across RTL, testbench, and environment layers Preferred Qualifications Experience spanning initial specification through post‑silicon bring‑up and validation Familiarity with power‑aware verification (UPF), formal verification, or hardware‑software co‑validation Domain expertise in ML accelerators, high‑speed interconnects (NoCs), or high‑bandwidth memory Experience with C/C++ for reference model development and enhancement Hands‑on experience with industry‑standard interfaces such as PCIe Gen 5/6, DDR5, or Ethernet Interest or experience in leveraging Generative AI and LLMs to accelerate verification workflows, such as automated testbench generation, documentation, or failure log analysis The expected base salary range for this full‑time position across US locations is listed below. Actual starting pay will be based on job‑related factors, including exact work location, experience, relevant training and education, and skill level. Your recruiter can share more about the specific salary range for the role location or, if the role can be performed remote, the specific salary range for your preferred location, during the hiring process. Waymo employees are also eligible to participate in Waymo’s discretionary annual bonus program, equity incentive plan, and generous Company benefits program, subject to eligibility requirements. #J-18808-Ljbffr

Vacancy posted 2 days ago
Similar jobs that could be interesting for youBased on the ASIC Design Verification Engineer in Mountain View, CA vacancy
  • $175k - $215k

     ...ASIC Design Verification Engineer Waymo is an autonomous driving technology company with the mission to be the world's most trusted driver. Since its start as the Google Self-Driving Car Project in 2009, Waymo has focused on building the Waymo Driver—The World's Most... 
    Suggested
    Full time
    Remote work

    Waymo

    Mountain View, CA
    3 days ago
  • $165k - $241.4k

     ...help each other grow. Because full product development—from design to qualification to production—is within our team, we're able...  ...digital world. Your Impact Set vision and strategy for ASIC verification methodology and execution across multiple programs and product... 
    Suggested
    Full time
    Temporary work
    Local area
    Flexible hours

    Webex Events (formerly Socio)

    San Jose, CA
    3 days ago
  •  ...revolutionary solutions for data centers by designing some of the most complex chips being...  ...! What You’ll Do Participate in the ASIC design verification for Cisco high‑end switching products...  ...electrical/computer science/computer engineering/related degree and 5+ years of... 
    Suggested

    Cisco

    San Jose, CA
    4 days ago
  •  ...Design Verification Engineer Location: Sunnyvale, CA Visa Type: C2C allowed We need someone with experience either in Block or SoC level...  ...strong C/ C++ coding skills Required: ~7+ years of ASIC verification experience ~ UVM/System Verilog ~ VCS simulator... 
    Suggested

    Omega Solutions Inc

    Sunnyvale, CA
    3 days ago
  •  ...Design Verification Engineer Sunnyvale, CA Do you want to be part of the AI revolution? Do you want to think out of the box, thriving on challenges...  ...complex project. Advanced knowledge of standard ASIC design and verification flows, simulation and testbench development... 
    Suggested
    Work at office

    Baidu

    Sunnyvale, CA
    2 days ago
  • $156k - $229k

     ...area. Apply link Copy link Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field...  ...practical experience. 8 years of experience with design verification. Experience with SystemVerilog. Preferred qualifications:... 
    Full time
    Worldwide

    Google Inc.

    Sunnyvale, CA
    1 day ago
  • $135k - $155k

     ...possible, with the ultimate goal of enabling human life on Mars. Design Verification Engineer (Silicon Engineering) SpaceX is leveraging its experience...  ..., architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing... 
    Permanent employment
    Temporary work
    Worldwide

    SPACE EXPLORATION TECHNOLOGIES CORP

    Sunnyvale, CA
    2 days ago
  •  ...Design Verification Engineer Responsibilities will include developing the verification environment; developing test plans and verifying the function of the ASIC/FPGA at both the full chip and block level. Skills: - Minimally, we are looking for someone with 1. Min... 

    Software Technology Inc

    Santa Clara, CA
    3 days ago
  •  ...Senior Asic Verification Engineer We are seeking experienced Senior Verification Engineers to join our rapidly expanding team, driving breakthrough...  ...you. Responsibilities Collaborate closely with design teams to review and understand specifications,... 

    Futran Tech Solutions Pvt. Ltd.

    Milpitas, CA
    1 day ago
  • $120k - $240k

     ...speed inference. Key Responsibilities Work with architects, designers, post‑silicon, and software engineers, to ensure a high‑quality design that works for silicon. Develop and implement verification strategies, detailed tests, and coverage plans based on micro‑... 
    Remote work

    CEREBRAS SYSTEMS INC.

    Sunnyvale, CA
    2 days ago
  • $143.8k - $230k

     ...The ASIC Product Division in Broadcom, a leading supplier of state...  ...will join a high‑performance design team responsible for state‑of...  .... Responsibilities Develop verification environments using modern...  ...in Electrical and Electronic Engineering, Computer Science, or equivalent... 
    Work experience placement
    Local area

    Broadcom Corporation

    San Jose, CA
    4 days ago
  •  ...and Oracle. THE PERSON: We are seeking a high-impact Design Verification Engineer with strong technical depth, ownership, and the ability to drive verification closure on complex, high-performance ASIC designs. The ideal candidate brings hands-on verification... 

    Advanced Micro Devices , Inc.

    Santa Clara, CA
    8 hours ago
  •  ...Have Skills: Solid minimum 8 + years Design Verification Experience Verification Experience...  ..., self-motivative Design Verification Engineer to join our growing team. As a key...  ...verification libraries like UVM ~10+years of ASIC design verification experience ~... 

    Varite

    Santa Clara, CA
    3 days ago
  •  ...Design Verification Engineer Location: Mountain View CA (Day-1 Onsite) Duration: 12 months Contract Client: Arrow Electronics Inc. Experience: 6+ Years Note: We are seeking a Design Verification Engineer with strong SV, UVM and AXI experience. Technical... 
    Contract work

    Kasmo Global

    Mountain View, CA
    3 days ago
  •  ...Job Title: Design verification Engineer Location: San Jose CA (Complete Onsite) Contract: 10+ Months Experience range - 5 to 15 years...  ...engineering, accompanied by a minimum of 8 years of experience in ASIC or a related field, or a Master's Degree in Electrical or... 
    Contract work
    Immediate start
    Night shift

    Apolis

    San Jose, CA
    4 days ago
  • $87.4k - $132k

     ...Position: Design Verification Engineer (eInfochips Inc) Job Description: What You'll Be Doing: Strong SV/UVM expertise AXI/NOC/Ethernet...  ...Responsible for architecting Verification Environment for ASIC SoC and providing verification support from defining verification... 
    Hourly pay
    Full time
    Temporary work
    Work experience placement
    Work at office
    Night shift

    Arrow Electronics, Inc.

    San Jose, CA
    8 hours ago
  • $164.47k - $311.89k

     ...Description: About the Role Intel is seeking a Senior Design Verification Engineer for the Silicon Chassis team. In this role, you will own...  ...Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement... 
    Internship
    Local area
    Immediate start
    Shift work

    Intel

    Santa Clara, CA
    4 days ago
  • $150k - $160k

     ...Immediate need for a talented Senior Design Verification Engineer . This is a Fulltime opportunity with long-term potential and is located in...  ...Requirements and Technology Experience: ~ Must have skills: ASIC/SoC Design Verification, SystemVerilog, UVM, and... 
    Full time
    Local area
    Immediate start

    Pyramid Consulting

    San Jose, CA
    8 hours ago
  •  ...Senior Design Verification Engineer Location: On-site in Santa Clara, CA Job Type: Full-Time Client is an innovative high-tech startup delivering...  ...using SystemVerilog and UVM. Strong experience in ASIC design verification flows and DV methodologies. Experience... 
    Full time

    InterSources

    Santa Clara, CA
    3 days ago
  •  ...functional, physical and testing design requirements. Engage with...  ...information to GPU, CPU and SOC verification team, timing and DFT teams....  ...in end-to-end cycle of ASIC execution starting from micro...  ...Qualifications BS in Electrical Engineering or equivalent experience (MS... 
    Work experience placement

    NVIDIA Gruppe

    Santa Clara, CA
    3 hours ago
  • $150k - $350k

     ...About ChipAgents ChipAgents is reinventing semiconductor design and verification through agentic AI workflows. Founded by leading experts in...  ...accelerates RTL design, verification, and simulation, enabling engineers to achieve unprecedented productivity and correctness.... 
    Shift work

    ChipAgents

    San Jose, CA
    3 hours ago
  •  ...POSITION: Senior DV Engineer Who We Are: Quest Global delivers world-class end-to-end engineering...  ..., but also perpetually driven to design, develop, and test as a trusted partner...  ...leading and executing end-to-end design verification activities for IP, Subsystem, or SoC-level... 
    Remote work

    RD SOLUTIONS INC

    San Jose, CA
    3 days ago
  •  ...Job Title: SoC Design Verification Engineer Location: San Jose, CA Job Description: We are looking for a highly skilled SoC/Performance DV engineer to drive system-level validation and performance characterization of complex SoCs. The role involves... 
    Night shift

    SWITS DIGITAL Private Limited

    San Jose, CA
    3 days ago
  • $141.91k - $269.1k

     ...Job Details: Job Description: The Role and Impact As an IP Design Verification Engineer, you will play a pivotal role in Intel's mission to advance cutting-edge technology. You will ensure that Intel's intellectual property (IP) designs meet rigorous quality standards... 
    Local area

    Intel

    Santa Clara, CA
    2 days ago
  •  ...Design Verification Engineer As a Design Verification Engineer, you will contribute to the functional verification of GPU Subsystems such as Shader, Texture, and Memory Systems. Responsibilities Triage regression failures and make testbench updates Debug... 

    Kasmo Global

    San Jose, CA
    3 days ago
  •  ...Job Description Change the world. Love your job. Texas Instruments is seeking Design Verification Engineer. In this role you will confirm the accuracy of designs for analog and mixed signal electronic parts, components, or integrated circuitry for analog and mixed... 
    Local area

    Texas Instruments

    Santa Clara, CA
    8 hours ago
  •  ...Design Verification Engineer Rootshell Enterprise Technologies Inc. is a recognized provider of professional IT Consulting services in the US. We are actively seeking a Design Verification Engineer for one of our clients. Location: Santa Clara, CA – Onsite Job... 

    Rootshell Inc

    Santa Clara, CA
    3 days ago
  • $60k - $148.5k

     ...Job Title: Design Verification Engineer City: Santa Clara State/Province: California Posting Start Date: 5/20/26 Wipro Limited (NYSE: WIT, BSE: 507685, NSE: WIPRO) is a leading technology services and consulting company focused on building... 
    Minimum wage
    Local area

    Wipro

    Santa Clara, CA
    4 days ago
  •  ...Micro-Processor Design Verification Engineer Responsibilities (depends on the detailed assignment, the candidate may actually carry out a portion of the responsibilities below): Design the verification architecture of a high-end 64 bit super scalar micro-processor... 

    Netpace

    Santa Clara, CA
    3 days ago
  • $138k - $317.8k

     ...create scalable, secure, and user-friendly applications. As we continue to grow, we’re looking for a skilled  Principal Design Verification Engineer – UAL & PCIe Subsystems  to join our dynamic team and contribute to our mission of transforming business processes... 
    Full time
    Local area
    Immediate start
    Visa sponsorship
    Relocation package

    Bright Vision Technologies

    Santa Clara, CA
    8 days ago

Do you want to receive more vacancies?

Subscribe and receive similar vacancies to ASIC Design Verification Engineer. Be the first to apply!