TPU Compute RTL Design Engineer — Equity & Impact
Google is looking for an experienced ASIC Design Engineer in Sunnyvale, California. In this role, you will take part in developing custom silicon solutions that power innovative consumer products. Your expertise will significantly impact the design and architecture of the next-generation data center accelerators. The position requires a Bachelor's degree in Electrical Engineering and substantial experience in digital design, particularly with SystemVerilog RTL. Competitive compensation includes a base salary of $163,000 - $237,000, along with bonuses and equity. #J-18808-Ljbffr Google
Vacancy posted 1 day ago
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...degree in Electrical Engineering, Computer Engineering, Computer... ...years of experience with RTL Design. Experience with... ...to drive cutting‑edge TPU (Tensor Processing... ...+ 15% bonus target + equity + benefits Google is... ...agreement. They have no impact on statutory payments...Employment EquityWorldwide- Google Inc. is seeking an experienced ASIC Design Engineer to help develop custom silicon solutions... ...years of experience with SystemVerilog RTL and a strong educational background in... ...range of $163,000 to $237,000, along with bonuses and equity. #J-18808-Ljbffr Google Inc.Employment EquityWork at office
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RTL Design and Integration Engineer, TPU and ML corporate_fare Google place Sunnyvale, CA, USA Apply Qualifications... ...degree in Electrical Engineering, Computer Engineering, Computer Science, a... ...is $138,000‑$198,000 + bonus + equity + benefits. Our salary ranges are determined...Employment EquityFull timeWorldwide$163k - $237k
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## Staff RTL Design Engineer - CPU LS/PF/MMUApplylocations: Santa Clara, California... ...transforming the future of compute by bringing the limitless... ...that will have a huge impact on people's lives; making the... ...promote pay transparency and equity. We have a market-based pay...Employment EquityWork experience placement- Google is looking for an RTL Design Engineer in Sunnyvale, California, to work on cutting-edge TPU technology. You will define microarchitecture, write performant RTL code... ...to ensure functional correctness. This role impacts Google's AI advancements. The ideal candidate should...
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..., driving cutting‑edge TPU technology that powers... ...You’ll work on SoC‑level RTL design for data center... ...designs. As a Soc Design Engineer on the TPU team you will... ...Electrical Engineering, Computer Engineering, Computer Science... ...) + 15% bonus target + equity + benefits. Learn more...Employment Equity$138k - $198k
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