Advanced ASIC Physical Design Engineer
Cisco Systems
Cisco is seeking a Physical Design Engineer to contribute to RTL-to-GDSII implementation for advanced semiconductor nodes. You will optimize floor planning, timing, and backend flows while collaborating with RTL, DFT, and EDA teams to deliver high-performance networking chips. You should have a Master’s degree or a Bachelor’s with 2+ years of ASIC experience, with hands-on experience in industry tools and strong scripting skills. #J-18808-Ljbffr
Vacancy posted 4 days ago
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