Senior Design Verification Engineer

As a senior Design Verification engineer, you will employ GenAI and agentic tools to build a design verification environment with an innovative workflow that improves verification efficiency and quality. You will demonstrate clear value in enabling schedule left‑shift and enhancing execution efficiency. Minimum Qualifications 5+ years of Design Verification experience using UVM System Verilog methodology. Bachelor's degree in Electrical Engineering or Computer Science related majors. Hands‑on experience with GenAI, including development of agentic MCP and skill‑based tools. Strong and relevant expertise with ASIC simulation tools and sophisticated verification methods. System Verilog, System C or C++, scripting skills. Experience in SoC plus CPU emulation verification environment. Proven track record of building test plans and coverage closure. Preferred Qualifications Master’s degree in Electrical Engineering or Computer Science related majors. Clear approach on how to achieve design verification quality sign‑off. Good interpersonal skills to work in a multi‑functional team in cross‑geographical locations. Salary The US base salary range that Micron Technology estimates it could pay for this full‑time position is: $168,000.00 - $336,000.00 a year Equal Opportunity Statement Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws. #J-18808-Ljbffr