Low-Power ASIC Validation Engineer (Multi-Voltage)
$163k - $237kGoogle Inc.
Google Inc. in Sunnyvale, CA is seeking a seasoned ASIC Design Engineer to lead low-power validation efforts for cutting-edge TPU technology. Candidates should possess a strong engineering background and proven experience in ASIC design, especially in post-layout physical validation and debugging. This role offers a salary between $163,000 and $237,000, along with a bonus, equity, and comprehensive benefits. We emphasize diversity and equal opportunity in our hiring practices. #J-18808-Ljbffr Google Inc.
Vacancy posted 1 day ago
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