Senior ASIC DFT STA Engineer - Timing & Validation
020 Cisco Systems, Inc.
Cisco Systems, Inc. is seeking an ASIC DFT STA Engineer to join the Silicon One development organization in San Jose.
You will drive timing constraints, DFT/STA strategies, and work across RTL design, CDC/RDC, and verification efforts to enable successful post-silicon validation. You will collaborate with diverse teams, contribute to design signoff activities, and help deliver next-generation networking chips for a global customer base.
#J-18808-Ljbffr- ...Cisco Systems, Inc. is seeking an ASIC DFT STA Engineer in the Silicon One development organization... ...detail-oriented engineer with strong timing expertise, collaborating with cross-functional... ...implementation flow and post-silicon validation. You will interact with teams across...Senior
$167.7k - $245.2k
...Silicon One development organization as an ASIC DFT STA Engineer. You are a detail-oriented STA... ...analytical skills and a deep understanding of timing constraints, such as clock groups,... ...implementation flow and post silicon validation phases with additional exposure to physical...SuggestedFull timeTemporary workWork experience placementLocal areaFlexible hoursShift work$167.7k - $245.2k
...Silicon One development organization as an ASIC DFT STA Engineer. You are a detail-oriented STA... ...analytical skills and a deep understanding of timing constraints, such as clock groups,... ...implementation flow and post silicon validation phases with additional exposure to physical...SuggestedFull timeTemporary workWork experience placementFlexible hoursShift work$167.7k - $245.2k
...Silicon One development organization as an ASIC DFT STA Engineer. You are a detail-oriented STA... ...analytical skills and a deep understanding of timing constraints, such as clock groups,... ...implementation flow and post silicon validation phases with additional exposure to physical...SuggestedFull timeTemporary workWork experience placementLocal areaFlexible hoursShift work$136k - $218.5k
...world.We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If... ...-chip/sub-chip Static Timing Analysis (STA) and timing convergence, timing constraints... ...checking/FV.Understanding of DFT logic and experience with DFT timing closure...SeniorFull time$164.47k - $269.1k
...IntelIntel is seeking an experienced Senior Static Timing Analysis (STA) Engineer to help drive the development of... ...architecture, logic design, clocking, DFT, and physical design teams to... ...develop flows for chip integration and validate clock network performance guidelines...SeniorFull timeLocal areaImmediate startShift work$167.7k - $245.2k
...comprehensive Design-for-Test (DFT) architecture that supports... ...to enable the integration and validation of the test logic in all... ...Bachelor's in Electrical Engineering or equivalent with at least 7... ...Cisco for defined periods of time. U.S. employees are eligible...SeniorFull timeTemporary workLocal areaFlexible hours3 days per week- ...Cisco's Silicon One team in San Jose seeks an experienced engineer to lead test planning and DFT verification for next‑gen silicon. You will develop test benches and own MBIST methodology across the portfolio, collaborating with RTL and physical design teams to ensure...Senior
$168k - $264.5k
...world.Join NVIDIA's Design-for-Test Engineering team in Santa Clara, CA, where we are... ...to solve emerging challenges. As a Senior DFT - Silicon Validation Engineer, you will work on ground breaking... ...protected by law.SummaryLocation: US, CA, Santa ClaraType: Full timeSeniorFull timeShift work$237k - $356k
...Ampere Computing is seeking a Senior Principal Design Engineer specializing in Static Timing Analysis (STA) and timing methodology... ...design, clocking, power, DFT, CAD, and silicon validation teams. Establish and... ...closure for complex ASIC, CPU, SoC, or high-performance...SeniorLocal area$129.4k - $207k
...If you are a first time user, please create... ...Description:Broadcom's ASIC Product Division (... ...candidates for a DFT position. The... ...Physical Design & STA team for DFT mode timing... ...closely with STA and DI Engineers design closure for... ...tape release.Validating & Debugging Test vectors...Full timeLocal area$168k - $264.5k
We are now looking for a Senior DFT Methodology Engineer! As a Senior DFT Methodology... ...verification, and post-silicon validation on some of the industry’s... ...will partner closely with timing, physical design, software,... ...including RTL & clocks design, STA, place-n-route and power,...SeniorFull time$168k - $264.5k
We are now looking for a Senior Circuit Timing Engineer!NVIDIA stands at the intersection of... ...and analog mixed-signal).Validate timing of custom circuit designs using STA tools including Nanotime, PrimeTime... ...timing and power convergence, DFT, as well as timing ECO...SeniorFull timeWorldwideShift work$136k - $218.5k
...today.Design-for-Test Engineering at NVIDIA works on groundbreaking... ...creative solutions for DFT architecture, verification and post-silicon validation on some of the industry... ...RTL & clocks design, STA, place-n-route and... ...: US, CA, Santa ClaraType: Full time...SeniorFull time$163k - $236k
Perform full chip static timing analysis, timing... ...sign-off for ASIC tape outs.Debug and resolve common STA or design rule issues... ...degree in Electrical Engineering, Computer... ...constraint development and validation, and timing closure... ...logic design, and DFT teams to understand...SeniorFull timeWorldwide- ...Tessolve is seeking a Principal STA Engineer to join our San Jose team to lead timing analysis and signoff for cutting-edge ASIC/SOC designs. You will drive timing closure across multi... ...collaborate with RTL, Physical Design, DFT, CTS, and CAD teams to enable successful tape...
$167.7k - $245.2k
...to verify comprehensive Design-for-Test (DFT) architecture that supports ATE screening... ...scale across massive designs to accelerate time-to-market for future silicon.Work with... ...QualificationsBachelor’s in Electrical Engineering or equivalent with at least 7+ years (or...SeniorFull timeTemporary workLocal areaFlexible hours3 days per week- ...United States is seeking an ASIC DFT STA Technical Lead. You will be a detail-oriented STA engineer with strong analytical skills and a deep understanding of timing constraints, such as clock groups... ...flow and post-silicon validation, with exposure to physical design...
$135k - $160k
...of enabling human life on Mars. SR. ASIC DFT ENGINEER (SILICON ENGINEERING) At SpaceX we’re... ...systems, firmware, architecture, design, validation, product engineering and ASIC... ...hierarchical test flows. Run and debug non‑timing and SDF annotated gate‑level simulations...SeniorPermanent employmentTemporary workWorldwideWeekend work- ...Annapurna Labs (U.S.) Inc. in Cupertino, CA is seeking a Sr ASIC validation engineer to lead SW-driven test development for Trainium and Inferentia engines, directing pre-silicon verification and ensuring silicon quality. You will mentor engineers, collaborate across...Senior
$185k - $250k
...A Silicon Valley-based hardware startup is looking for a highly experienced Post-Silicon ASIC Validation Engineer. The role involves leading validation of complex networking ASICs and chiplet-based architectures. The ideal candidate has strong expertise in post-silicon...Senior$168k - $264.5k
We are now looking for a Senior ASIC Design Engineer to join our DFT team!NVIDIA has continuously... ...and post-silicon validation on some of the industry's... ...verification, synthesis, timing, and backend teams to ensure... ...domains such as clocking, STA, place & route, and power...SeniorFull time- ...Etched.ai, Inc. is seeking a Design For Testability (DFT) Engineer to enhance the testability of integrated circuits. The ideal candidate... ...production. This position requires 10+ years of DFT experience in ASIC or SoC environments and offers comprehensive benefits...SeniorRelocation package
- ...01Our client is seeking a Senior ASIC Verification Engineer to join their team. As a Senior... ...supporting the DFT and ASIC verification efforts... ...for-Test (DFT) and silicon validation.Job Title:Senior ASIC Verification... ...and debug issues for non-timing and back-annotated timing...SeniorTemporary workFor contractorsImmediate startRelocationFlexible hours
- ...NVIDIA Corporation in Santa Clara, CA seeks a Senior ASIC Design Engineer for Clocks IP to architect clock domains for GPUs/CPUs, collaborating... ...front-end, floorplanning and back-end teams to meet timing, PPA and DFT requirements. Role involves implementing clocking...Senior
- ...Cisco Systems, Inc. is seeking a senior engineer for the Silicon One development organization to push high-quality DFT RTL and robust silicon solutions, collaborating with front-end RTL and backend physical design teams to align with Cisco's scalable architecture. The...Senior
- ...CPU Cache Coherent Interconnects Design Engineer to own the physical design of the on-... ...level caches. You will perform synthesis, timing closure, and power optimization while... ...contribute to RTL design/verification, and navigate the ASIC flow with DFT/ECO #J-18808-Ljbffr...Senior
- ...Etched is seeking a highly skilled Design For Testability (DFT) Engineer to ensure robust testability of ICs from design to production. You will develop DFT architectures, integrate scan, boundary scan, BIST, MBIST, and work with design/verification teams to improve coverage...Senior
$168k - $264.5k
...world.We are seeking an innovative Senior STA Signoff Methodology Engineer to help drive sign-off strategies for... ...impact of advanced technologies on chip timing.Develop STA and PNR flows and... ...experience, with 8 years of experience in ASIC design and timing.Solid...SeniorFull time$168k - $264.5k
As a Senior DFT Engineer - Post-Silicon , you will take pioneering DFT capabilities beyond implementation... ...-up, failure analysis, test-content validation, and production deployment.Help... ...modeling and analysis that supports test-time optimization, quality improvement, yield...SeniorFull time
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