Senior Staff IC Design Engineer - SOC & IP Integration
AnySilicon
Marvell is seeking a seasoned SoC design engineer to lead integration of internal and external IP blocks within the SOC team in Santa Clara. You will own portions of the SOC from inception to tape-out, collaborate on floorplanning, and drive timing closure using state-of-the-art EDA tools. The role requires strong SystemVerilog RTL skills, experience with clock/reset, CDC, and timing constraints, and familiarity with ARM protocols and interconnect architectures. #J-18808-Ljbffr
Vacancy posted 1 day ago
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