RTL Design Engineer
$129.3k - $225.3kApple Inc.
Cupertino, California, United States Hardware At Apple, we work every day to craft products that enrich people's lives. If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. This is an exciting position in the world class Apple mixed-signal silicon design team! This role will build upon your solid foundation in digital logic circuits while introducing mixed-signal and analog circuit design and features. You will work with a variety of flows fundamental to modern silicon engineering: modeling and integrating high-performance mixed-signal and analog IPs into high-speed digital circuits, ensuring formal equivalence between custom designs and their abstract representations. This is an excellent opportunity to gain valuable experience in software methods and analysis, which are increasingly crucial across the semiconductor industry. As a member of our dynamic team, you will have the exceptional opportunity to help create the next generation of products that will delight and inspire millions of Apple customers every day. You will work to specify, design, verify, and support lab bring‑up of sophisticated digital and mixed-signal circuits with signal processing capabilities. Description In this role, you will be responsible for specifying and/or micro-architecting digital and signal processing blocks in sophisticated mixed-signal circuits. You will be responsible for RTL coding of blocks specified by you or others, including implementation of DSP algorithms. You will also participate in the design verification and bring‑up of such blocks by writing meaningful assertions, debugging code, and otherwise interacting with the design verification team. You will contribute to the lab bring‑up of those circuits by potentially writing test scripts, analyzing lab data, proposing experiments, and validating signal processing performance. Responsibilities RTL Design & Implementation: Develop and optimize RTL code in Verilog/SystemVerilog for mixed-signal digital blocks and signal processing pipelines DSP Algorithm Translation: Collaborate with algorithm engineers to translate DSP concepts (filtering, transforms, modulation, signal analysis) into efficient, high-performance RTL implementations Design Verification: Write comprehensive assertions, unit‑level testbenches, and participate in functional verification using industry‑standard methodologies Integration & Bring‑up: Partner with cross‑functional teams to integrate complex IPs, validate performance in silicon, and support lab characterization Collaborative Problem‑Solving: Work effectively with analog designers, algorithm engineers, verification specialists, and system architects across disciplinary boundaries Minimum Qualifications Bachelors of Science in Electrical Engineering Preferred Qualifications Front‑end tools expertise (Verilog simulators, linters, clock‑domain crossing checkers) Synthesis, static timing analysis, and design‑for‑test (DFT) SystemVerilog assertions, checkers, and advanced verification techniques Scripting languages (Perl, Python) Formal verification and low‑power design methodologies Hardware‑software co‑design and system‑level optimization Hands‑on DSP experience: signal processing concepts, RTL algorithm implementation, hardware optimization techniques (pipelining, parallelization, resource sharing) Intermediate to advanced GenAI proficiency: Using AI tools for SystemVerilog design, validation, optimization, and understanding GenAI capabilities/limitations in hardware design At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $129,300 and $225,300, and your base pay will depend on your skills, qualifications, experience, and location. Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program. Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant. At Apple, we believe accessibility is a fundamental human right. You’ll find that idea reflected in everything here — in our culture, our benefits and our digital tools. By welcoming as many perspectives as possible, we help you build a career where you feel like you belong. Learn about accessibility in Apple’s workplace Learn about reasonable accommodations for job applicants Apple accepts applications to this posting on an ongoing basis. #J-18808-Ljbffr Apple Inc.
$163k - $236k
Lead the PCIe microarchitecture and RTL development, ensuring high-performance designs that strictly adhere to Power, Performance, and Area (PPA) targets... ...Minimum qualifications:Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a...SuggestedWorldwide$163k - $236k
...create and review management and control subsystem's design microarchitecture specifications.Develop SystemVerilog RTL to implement logic for ASIC products according... ...qualifications:Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a...SuggestedWorldwide$100k
...looking for contributors of all seniorities.Tenstorrent is seeking a highly skilled Physical Design Engineer to drive the critical Die-to-Die (D2D) Physical Implementation from RTL to GDSII. This role demands deep expertise in full physical design flow with a specific...SuggestedPermanent employmentRemote work- ...Console APUs using a flexible controller design as the base for all our IP. We are looking... ...experienced, conscientious logic design engineer in the Dram Controller IP at AMD's Santa... ...design engineer with a strong background in RTL development and a commitment to advancing...SuggestedFlexible hours
- Responsibilities: • Architect, design and implement new features, performance improvements... ...is a plus. • Proficiency with hardware (RTL) design in Verilog, System Verilog, or VHDL... ...work well with others and a belief that engineering is a team sport. • Knowledge of at least...Suggested
- ...We have following urgent role with our DIRECTclient. Title: RTL Design Engineer Location: Santa Clara, CA & Hudson, MA. Duration: 6+ Months Communication techniques (PHY, FFT, Filters, modulations, coding, acquisition) Wireless or wireline modem communications or DSP background...
- ...THE ROLE: We are looking for an adaptive, self-motivative Design Verification Engineer to join our growing team. As a key contributor, you will be... ...that delivers Industry leading IP and help our experts in RTL, FW, circuit, and architecture teams develop leading edge and...Contract workWork at office2 days per week3 days per week
$138k - $197k
...proposing and developing improvements in overall design.Design and document one or more blocks of... ...:Bachelor's degree in electrical engineering, computer engineering, computer science,... ...e.g., SoCs, ASICs, etc.).Experience with RTL design using Verilog or SystemVerilog.Preferred...Worldwide$138k - $197k
...quality, performant, and power-efficient RTL code primarily in SystemVerilog.Partner with... ...the continuous enhancement of internal design tools, flows, and methodologies.Work... ...qualifications:Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science,...Worldwide- ...verification libraries like UVM 10+ years of ASIC design verification experience Experience /... ...Collaborate with architects, hardware engineers, and firmware engineers to understand the... ...Proficient in debugging firmware and RTL code using simulation tools KEY RESPONSIBILITIES...
- ...Job Description Job Description RTL Design Engineer Building AI chips that are hard-coded for individual model architectures. RTL Design Engineer As an RTL Engineer, you will be critical in ensuring that our AI chips operate correctly and efficiently....Work experience placement
- Apple is seeking an RTL Design Engineer in Cupertino, California to advance mixed-signal and digital blocks in silicon. You will specify, design, verify, and support lab bring‑up for high‑speed RTL circuits with signal processing capabilities. The role emphasizes Verilog...
$184.7k - $324.8k
...California, United States Hardware Specify, design and help in the verification and lab... ...In this job, you will be responsible for RTL coding of blocks specified by you or others... ...designers and design verification engineers.Formal tools like LINT, CDC,RDC will be used...Work experience placementRelocation$163k - $237k
...Qualifications Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science,... .... 8 years of experience in ASIC design. Experience interacting with software, system... ...bus protocols. Responsibilities Design RTL Intellectual Property (IP) focusing on...- Redolent Infotech Pvt. Ltd. is seeking an RTL Design Engineer for an urgent contract role in Santa Clara, CA and Hudson, MA. The incumbent will work on communication techniques (PHY, FFT, filters, modulations, coding, acquisition) and DSP-based wireless or wireline modem...Contract workImmediate start
$200k - $250k
Job Title: Principal RTL Design Engineer - PCIe / CXL / High-Speed SoCLocation: Santa Clara, CACompensation: $200K - $250K base DOE plus bonus and RSUs ($300K - $350K+ total comp.)Requirements: RTL Design, Verilog / SystemVerilog, PCIe / CXL / Ethernet / UALink, High-Speed...- SPACE EXPLORATION TECHNOLOGIES CORP is looking for a motivated SR. RTL DESIGN ENGINEER in Sunnyvale, CA to develop cutting-edge ASICs for Starlink. This role includes responsibilities in evaluating design architectures, implementing RTL in Verilog/System Verilog, and collaborating...
- Apple Inc. is seeking an experienced RTL Design engineer to contribute to advanced mixed-signal circuit blocks in Cupertino. You will write RTL code, create detailed design specs, and collaborate closely with system architects, circuit designers, and design verification...
$146.72k - $190.1k
Company: Qualcomm Atheros, Inc. Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: This individual... ...-defined responsibility for the digital architecture, design, Verilog RTL coding, implementation, and verification of next generation...- Qualcomm Atheros, Inc. is seeking an experienced ASIC engineer to independently plan and execute digital architecture, Verilog RTL coding, and verification for next-generation wireless and wired SoCs. You will design, verify, and deliver complex ASICs through functional...
- Intel's HIPD team seeks a senior Logic design engineer for UCIE PHY IP in datacenter/server designs. You will develop RTL, define architecture features, and ensure design quality from RTL to timing convergence. The role requires strong SystemVerilog expertise, collaboration...
- A tech company in Cupertino is seeking an experienced ASIC/VLSI Design Engineer to design innovative communication systems. The role involves collaboration with multiple teams, RTL coding, and optimization of design for performance. Candidates should have over 5 years...
- Apple Inc. in Cupertino, California, is seeking an experienced RTL engineer to specify, design and verify advanced mixed-signal circuits, focusing on the digital side. You will collaborate with system architects, circuit designers and design verification engineers to ensure...
$163k - $237k
Lead the microarchitecture and RTL execution to deliver high-performance network design components which meet strict power, performance and area (PPA) goals... ...Minimum qualifications:Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a...Worldwide- Google Sunnyvale, CA is seeking a mid-level RTL Design Engineer to shape AI/ML hardware accelerators. You will work on TPU architecture, verify complex digital designs, and collaborate with software teams to deliver high-performance AI workloads. Requirements include a...
- Intel Corporation's HIPD team seeks a senior Logic design engineer to advance the UCIE PHY IP for datacenter/server designs. You will craft RTL, simulate, and contribute to architecture definitions for the IP block. Responsibilities include RTL quality checks, timing and...
- Google Inc. in Sunnyvale, CA is seeking an experienced engineer for an ASIC design role focused on management and control subsystem design. The successful candidate will work on SystemVerilog RTL for ASIC products and collaborate with architecture, validation, and hardware...
$170k - $235k
...SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. SR. RTL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we’re leveraging our experience in building rockets and spacecraft to deploy Starlink, the...Permanent employmentTemporary workWorldwideWeekend work- Google is seeking an RTL Design Engineer for the TPU team in Sunnyvale, CA to shape next‑gen AI accelerators. You will design and verify microarchitecture and RTL in SystemVerilog, collaborating with DV, PD, and firmware to deliver high‑quality hardware. The role focuses...
- GlobalFoundries in Santa Clara is seeking recent graduates to become a world-class CPU IP Design Engineer, owning RTL development of the latest AI-enabled RISC-V CPU core. The candidate will be responsible for all aspects of the design, including functional features, performance...
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