Average salary: $163,052 /yearly
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$185.2k - $250k
...interfaces, embedded processors, and DSP solutions in latest CMOS generation technologies. In this role you will: · Architect and define DFT solutions adapted to the specific use of various LEO’s chips. · Contribute to the improvement and customization of IPs and DFT...SuggestedPermanent employmentLocal areaFlexible hours- ...Job Description Job Description Job Summary We are looking for a skilled DFT/ATPG Engineer with 5 years of hands-on experience in ASIC/SoC design and manufacturing test. The candidate should have strong knowledge of DFT fundamentals, ATPG, scan-based testing...Suggested
Katalyst Healthcares & Life Sciences
Santa Clara, CA11 days ago - ...Job Description Job Description Required Technical Skills: 5 years of hands-on experience in Design for Test (DFT) and Automatic Test Pattern Generation (ATPG) for SoC or ASIC designs. Strong understanding of DFT fundamentals, including controllability, observability...Suggested
Katalyst Healthcares & Life Sciences
Santa Clara, CA11 days ago - ...work as one team across New York City, Silicon Valley (Mountain View), London, Copenhagen, and Seoul. The Role As a Design-for-Test (DFT) Engineer at Normal, you will own the DFT architecture and implementation for our next-generation, physics-inspired ASICs, from early...Suggested
- Title: DFT Engineer (Design for Testability) Location: San Jose, CA and Austin, TX (Hybrid 3 days Onsite) Duration: 12 months Interview: MS Teams Job Summary Good understanding of DFT fundamentals and methodology Experience with DFT insertion and verification Experience...Suggested
- ...is only as good as the silicon it produces, and silicon only counts once it has been tested, screened, and shipped. We are hiring a DFT engineer who treats testability as a first‑class design discipline: someone who has architected the scan, MBIST, and boundary‑scan infrastructure...SuggestedFlexible hours
- DFT Concepts: Mastery of basic digital logic design, scan architecture, boundary scan, Logic BIST (LBIST), and eFuse configuration. EDA Tool Proficiency: Hands-on experience with industry-standard tool suites: Siemens/Mentor Graphics: Tessent (Max, FastScan, TK) Synopsys...Suggested
- ...advance your career. THE ROLE We are seeking an experienced SoC DFX Engineer to help define, design, and verify robust Design for Test (DFT) and Design for Debug (DFD) solutions for complex, highperformance SoCs. In this role, you will collaborate closely with architecture...Suggested
$160k - $230k
...scalability, and resiliency challenges in large-scale AI data center clusters. We are backed by top-tier VC firms and notable angel investors. DFT Engineer - Verification We are a startup building foundational technology to address performance, scalability, and resiliency...SuggestedRemote work- ...Job Description Job Description Job Title: DFT Principal engineer Location: Santa Clara, CA Onsite/ Remote: Day 1 Onsite at customer location JD: Position Responsibilities: Experience : 8 to 12 yrs Experience in Scan Insertion, ATPG, MBIST...SuggestedWork experience placementRemote work
Yantran LLC
Santa Clara, CA11 days ago - Benefits Day-1 Onsite Competitive salary Opportunity for advancement DFT Engineer (Design for Test) Location: Santa Clara, CA (Onsite) Employment Type: Long‑Term Contract Interview Process: Virtual Interviews Compensation: Based on Experience (DOE) Engagement: ANY...SuggestedLong term contractLocal area
- Fulltime role with L&T Technology Services (LTTS) Summary: DFT Verification Engineers with Strong RTL and gate-level debug skills using Verilog/SystemVerilog, simulation, and waveform analysis. Key Responsibilities Verify and debug complex scan and DFT architectures from...SuggestedFull time
- We are seeking a highly experienced Design for Test (DFT) Engineer to contribute to the development of complex SoC/ASIC designs. This role will focus on DFT planning, integration, testing methodologies, and continuous improvement of DFT flows across chip-level and block...Suggested
- ...patterns and improve Fault coverage, check and debug ATPG DRCs -Knowledge of Codec/EDT architecture, OCC working in different modes, DFT mode clockings - to debug complex scan issues indepedently/with minimum supervision -Verify ATPG tests in Zero delay and SDF...Suggested
- ...&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. You Are You are a hands-on DFT expert who has driven test architecture and implementation for complex SoCs that tape out and succeed in production, not just in reviews...Suggested
$136k - $218.5k
...join us today. Design‑for‑Test Engineering at NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post‑silicon validation on some of the industry's most complex semiconductor chips. What you’ll be doing...- ...leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history. Job Summary As a DFT Intern at Etched, you will help review and refine DFT flow automation to support chip-level regression on Caelius. You will work...InternshipSummer internshipWork at officeRelocation
Etched
San Jose, CA28 days ago - Job Description Job Description Job role: DFT Engineers Location: Santa Clara, California (Bay Area) (Onsite) Contract Client: L&T Role Summary DFT Engineers Requirements: • DFT expertise is a plus • Experience with Scan, ATPG, and MBISTContract work
$146k - $232k
...diverse, but our team shares a love of the outdoors and a desire to protect it for future generations. Role Summary As a DFT Engineer you will be responsible for defining, implementing and deploying advanced Design-for-Test (DFT) methodologies including Scan...Full timeContract workTemporary workPart timeLocal areaShift work- Nuvacore is building a ground-up high performance, low-power CPU for next-generation compute workloads. As DFT engineers within the CPU team you will be responsible for test related pre-silicon and post-silicon activities. We will be delivering a DFT architecture which...
- Company QFocus Technologies Location Sunnyvale, CA Domain Embedded AI Job Overview As a Senior DFT Engineer at QFocus Technologies, you will be responsible for defining, architecting, and executing robust Design-for-Test strategies for high-performance SoCs and ASICs. You...
- ...Job Description Job Description Join the leading chiplet startup! As an Eliyan DFT Implementation lead, you will be working at a fast-paced early-stage startup creating technologies that fuel tomorrow’s chiplet based systems with best-in-class power, area, manufacturability...
Eliyan
Mundelein, IL23 days ago $168k - $264.5k
...work, to amplify human creativity and intelligence. Make the choice to join us today. NVIDIA’s DFX team is looking for an exceptional DFT Engineer to help shape the future of compute. As stewards of the entire Scan Test Lifecycle, we drive innovation for the most...- DFT Engineer You will join a team working on leading-edge projects in the Business Unit (BU) MCU & MPU Engineering & Design Enablement (MMEDE). MMEDE BU brings the technology and ecosystem relationships for next gen automotive Processing, Edge Processing & Radar Processing...Local area
- ...Position Summary : We are looking for a highly experienced Senior MBIST Contractor to join our SoC Design-for-Test (DFT) team. The role is focused on hands-on Memory BIST implementation using Synopsys MBIST (SMS). The ideal candidate is an independent contributor who...For contractors
- ...and that's where you come in. Join our team and help us continue to make Cirrus Logic an exceptional place to grow your career! As a DFT engineer in our mixed signal audio development team, you will be performing initial test planning, inserting memory BIST and scan, improving...
- ...paced environment where your technical voice directly impacts the physical products shaping tomorrow’s technology landscape. The DFT and Test Engineer runs the testability review inside the design phase. This role is responsible for checking test point access,...Work at officeWorldwideShift work
- ...Job Description Job Description Job Title: DFT Principal engineer Location: Santa Clara, CA Onsite/ Remote: Day 1 Onsite at customer location The pay range for this role is ***k- ***k per annum including any bonuses or variable pay. *** also offers benefits...Contract workWork experience placementRemote work
$170k - $200k
...Industry: Semiconductor, AI Infrastructure, Cloud Hardware Salary: $170,000-$200,000 USD + Equity (4-year vesting) Experience: 5-8 years (DFT specialization required) Visa: H1-B sponsorship available Summary: Well-funded hardware startup (with $180MM in recent funding,...Full timeRelocationVisa sponsorship$186.9k - $267.7k
...power the future of the digital world. Your Impact You will be in the Silicon One development organization as an ASIC Technical Leader- DFT. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements...Full timeTemporary workLocal areaFlexible hours
