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- ...Micron Technology, Inc. seeks an experienced SoC DFT architect to own design-for-test hardware and verify testability across the RTL-to-GDS flow. You will implement scan, MBIST/LBIST, JTAG, and ATPG concepts while coordinating with RTL, synthesis, STA, and physical...Suggested
- ...· Austin and Santa Clara Nuvacore is building ground-up high performance, low-power CPU for next-generation compute workloads. As DFT engineers within the CPU team you will be responsible for test related pre-silicon and post-silicon activities. We will be delivering...SuggestedFull time
- ...Nuvacore, Inc. is seeking a CPU DFT Engineer to help shape test-related pre-silicon and post-silicon activities for a next-generation high-performance CPU. You will contribute to a DFT architecture aligned with industry-leading power, performance and area targets, delivering...Suggested
$199k - $347k
...technologies that power virtual reality, neural networks, and next‐generation computing. In this role, you will own design for test (DFT) solutions for complex high‐bandwidth memory (HBM) system‐on‐chip (SoC) base‐die designs. Your work will directly enable manufacturability...SuggestedFull timeLocal areaImmediate start- ...the complete PCB design process, including: ~ Schematic capture ~ PCB layout oversight ~ DFM (Design for Manufacturability) ~ DFT (Design for Testability) ~ Embedded programming experience with microprocessors and FPGAs. ~ Proficiency with circuit simulation tools...SuggestedImmediate startFlexible hours
$150k - $180k
...primary point of contact when issues arise at the CM. Responsibilities Partners with engineering on process design and DFX (DFM/DFA/DFT/DFS) for kit builds, fixtures, work instructions, routers, build sequencing, translating designs into a CM-ready package before...SuggestedContract workShift work$184.7k - $324.8k
...verifying basic operations, analyzing robustness and margins in system. Work with design teams to understand the architecture and define DFT needs to help enhance testability and first-time silicon success. Be involved in mixed-signal verification tasks to better understand...SuggestedRelocation- ...transmitters, bias generators, and clock networks, aiming for best-in-class power, performance, and area. You will develop analog DFT techniques, create test plans, and collaborate with production test teams to debug bring-up issues. The role requires strong fundamentals...Suggested
- ...best-in-class power, performance, and area metrics. A key part of your design responsibilities will include the development of analog DFT circuits and techniques essential for comprehensive PHY validation. You will develop test plans, review and analyze data to guarantee...Suggested
- ...solutions that support successful product launches and ongoing manufacturing performance. Drive early engagement in Design for Test (DFT), manufacturability assessments, risk mitigation planning, and product validation activities to improve product quality and...SuggestedContract work
- ...Staff for the pre-silicon IP design team, you will work closely with the architecture, IP design verification, SOC design/verification, DFT, physical design and product engineers to achieve first pass silicon success. As an IP Design lead, you will guide a team of design...SuggestedFull timeFlexible hours
- ...space environment (vacuum, thermal cycling, radiation, vibration)* Understanding of design for manufacturing (DFM) and design for test (DFT) principles* Knowledge of conformal coating, potting, and other space-qualification techniques* Previous experience with aerospace or...SuggestedPermanent employmentFull timeTemporary workLocal areaWorldwide
$201k
...component readiness, tooling leads, vendor deliverables, and factory build execution. Design for Excellence (DFX): Ensure DFM/DFA/DFT requirements are integrated into early mechanical and electrical detailed design phases. Cost & BOM Tracking: Manage program...SuggestedFull timeContract workTemporary workWork at officeRelocation packageFlexible hours$146k - $194k
...transition of products from prototype to full‑rate production with speed, flexibility, and scalability. Champion Design for Testability (DFT) by working with cross‑functional teams (Design, Quality, NPI) to drive best practices into the early design effort, ensuring new...SuggestedFull timeContract workWork experience placement$223.9k - $302.9k
...teams experience ~ Deep working knowledge of the chip development lifecycle: RTL verification milestones, physical design convergence, DFT, and timing closure. ~ Experience managing programs with external design partners and IP vendors where you don't control the...SuggestedLocal areaFlexible hoursShift workDay shift$175k - $229k
...optimizations, and Timing constraint checks; Scripting skills using Perl; and Design Verification (DV), Design for Testability (DFT), Static Timing Analysis (STA), and Low Power Checks#LI-DNI Main Requirements and Qualifications ~ Education Requirements:...Temporary work$167.7k - $245.2k
...instrumentation (oscilloscopes, analyzers, traffic generators) as part of validation and characterization. Working closely with RTL, DFT, ATE, firmware, and system architecture teams to ensure a smooth transition from pre-silicon verification to post-silicon validation....Full timeTemporary workLocal areaFlexible hours- ...This advanced research and leadership role blends diagnostics depth with systems thinking, AI innovation, and broad cross‑functional influence across Design, DFT, Product Engineering, Test, Failure Analysis, Yield, Automation, and AI teams. #J-18808-Ljbffr Jobleads-US
- ...characterize SRAMs and register files to optimize PPA at advanced process nodes. You will supervise layout, drive PDV closure, and own end-to-end memory IP signoff, collaborating with foundry, CAD, RTL and DFT teams to deliver production-ready IP. #J-18808-Ljbffr Jobleads-US
- ...API, AOI (PCBA), AXI (PCBA), AOI (System), Test Strategy Creation, IPC-610, Quality Dat (KPI), DFM - Manufacturing, DFA - Assembly, DFT / Physical Test, DFT - Electrical Test MACHINING & OTHER: ESD Controls, Pack & Ship, CNC programming, Secondary Processing, Sheet...Work at officeLocal areaWorldwideFlexible hoursShift work
- ...Analysis + Reliability Analysis (MTBF, parts count, FIT rates) + Design Failure Modes and Effects Analysis (DFMEA) + Design for Test (DFT) + Design for Manufacturability (DFM) + EMI/EMC Analysis and mitigation per applicable standards (e.g., MIL-STD-461)* Support PCB...Permanent employmentTemporary workLocal areaWorldwide
- ...of engineers across architecture, verification, and SOC integration. You will ensure first-pass silicon success and coordinate with DFT, physical design, and firmware teams to deliver robust IP subsystems with third-party integrations. The role requires deep experience...
- ...hyperscalers. Responsibilities: Develop and validate timing constraints for intricate SoC designs. Collaborate with Architecture, RTL, DFT, and Analog teams to analyze timing complexities and develop consolidated timing modes and constraints. Own and contribute to...
- ...to lead RTL design efforts for ARM-based CPU subsystems and drive module IP development. The role includes front-end verification, DV/DFT/STA, and scripting with Perl to automate tasks. Requirements include a Bachelor's degree in Electrical/related field and 10+ years...
- ...circuits and ensure first-time silicon success while delivering high-quality IP for Apple’s products. Ownership of SerDes bring-up, validation and debug, plus defining DFT needs and working with design teams to analyze robustness and margins. #J-18808-Ljbffr Jobleads-US
- ...a Custom Clock Design and Distribution Engineer to architect end-to-end clock networks for high-frequency CPUs, collaborate with PLL/DFT teams, and drive PPA targets. You will perform transistor-level clock circuit design, from dividers to deskew and clock-gating, and...
- ...Engineer to lead ASIC/VLSI synthesis and design in Irvine, CA. You will develop timing constraints, collaborate across RTL, Architecture, DFT, and Analog teams, and own Front-End tasks including Synthesis, UPF, and ECOs to meet power, performance and area targets. You...
- ...Engineer in Irvine, CA to develop and validate timing constraints for intricate SoC designs. You will collaborate with Architecture, RTL, DFT, and Analog teams to implement timing signoff, ECOs, and scripts for streamlined flows. You will perform static timing analysis...
- .../μ-arch, and partner teams to ensure timely design cycle progress and PPAs. The role requires strong experience in PD signoff and DFT timing, plus excellent collaboration and communication abilities to influence tools and methodologies across the team. #J-18808-Ljbffr...
- ...understanding of end-to-end physical design closure, spanning all signoff domains Well-versed in timing constraints for both Functional and DFT (Design for Test) modes. Strong communication and collaboration skills REQUIREMENTS NICE TO HAVE Possess substantial years...