Sign up to access all features of our service.
  • Job search
  • Favorites
  • Create a CV
    New
  • Salaries
  • Subscriptions

ASIC Verification Engineer — IP/SoC, UVM Expert

Technical-Link N. America

Technical-Link N. America is looking for candidates for a design verification role in Austin, Texas. Responsibilities include defining IP/SoC verification plans, developing functional tests, and collaborating with design teams to ensure quality. The ideal candidate should have a B.S or M.S degree in Electrical Engineering, Computer Engineering, or Computer Science, along with practical experience in Verilog, SystemVerilog, and UVM methodology. This position offers the opportunity to work on cutting-edge verification techniques. #J-18808-Ljbffr Technical-Link N. America

Vacancy posted 1 day ago
Similar jobs that could be interesting for youBased on the ASIC Verification Engineer — IP/SoC, UVM Expert in Austin, TX vacancy
  • $168k - $264.5k

    NVIDIA is seeking a Senior Custom SOC/IP Verification Engineer to verify the next generation SoC and IP solutions. The role requires...  ..., and a deep knowledge of SystemVerilog and UVM. What You’ll Be Doing Responsible for ASIC design verification of fabric and interconnect... 
    Suggested
    Night shift

    NVIDIA

    Austin, TX
    1 day ago
  • $136k - $218.5k

     ...Austin, Texas, is seeking an experienced ASIC Verification Engineer. In this role, you will design and...  ...verification environments, work on system-level IP, and improve verification methodologies...  ...will have a strong background in UVM and System Verilog, a degree in Engineering... 
    Suggested

    NVIDIA

    Austin, TX
    1 day ago
  •  ...Austin, Texas is seeking an experienced ASIC Digital Verification Engineer to ensure the highest quality in...  ...verification environments for Interface IP protocols, create detailed test plans,...  ...verification, proficiency in SystemVerilog and UVM, and strong problem-solving skills.... 
    Suggested

    Synopsys

    Austin, TX
    1 day ago
  • AMD is seeking an ASIC Design Verification Engineer in Austin, Texas, to develop cutting-edge verification methodologies...  ..., and ensuring the quality of complex IP blocks. The ideal candidate will have...  ..., strong skills in SystemVerilog and UVM, and experience in ASIC verification.... 
    Suggested

    AMD

    Austin, TX
    1 day ago
  • Apple’s Silicon Engineering Group seeks a Design Verification Engineer in Austin, TX to verify complex Cellular SoCs for 5G platforms. You will craft reusable UVM testbenches, implement coverage-driven strategies, and drive AIML-based verification tools in collaboration... 
    Suggested

    Y-Axis

    Austin, TX
    1 day ago
  • $116k - $189.75k

    NVIDIA is hiring an ASIC Verification Engineer in Austin, Texas, to enhance the testing and verification process for global products. In this role...  ...verification experience. Proficiency in SystemVerilog and UVM is essential. The position offers a competitive salary range... 

    NVIDIA

    Austin, TX
    1 day ago
  • $108k - $184k

    Join to apply for the ASIC Design Verification Engineer - New College Grad 2026 role at NVIDIA...  ...The NVIDIA System‑On‑Chip (SOC) group is looking for an...  ...NVIDIA working on a system‑level IP responsible for measuring...  ...the design. Create the UVM components, sequences, tests... 
    Full time

    NVIDIA

    Austin, TX
    1 day ago
  •  ...Join to apply for the SoC Design Verification Engineer role at Inspire...  ...3rd-party peripheral IP integrations. You will...  ...Create and maintain UVM/SystemVerilog based testbenches...  ...-on experience in ASIC/SoC design...  ...knowledge in a new way. Experts add insights directly... 
    Full time

    Inspire Semiconductor, Inc.

    Austin, TX
    1 day ago
  • $125 - $135 per hour

     ...leading tech consulting firm is seeking a highly skilled Design Verification Engineer to verify the functionality of GPU designs in Austin, TX. The...  ...of experience in the field, proficiency in System Verilog, UVM, and excellent problem-solving skills. This contract position... 
    Contract work

    BayOne Solutions

    Austin, TX
    1 day ago
  • $147.4k - $272.1k

     ...projects that Apple’s Silicon Engineering Group has embarked upon...  ...a set of sophisticated SOCs that are driving Apple’...  ...multiple sophisticated IP-level DV environments, craft highly reusable UVM TB, implement effective...  ...DV methodology, verification on accelerated platforms... 
    Relocation
    Flexible hours

    Apple

    Austin, TX
    3 days ago
  • Overview We are now looking for a Senior ASIC Verification Engineer for our Coherent High Speed...  ...coherent interconnects for our mobile SoCs and GPUs. In this position, you will be...  ...developing TB\'s from scratch using SV and UVM methodology is desired. C++ programming... 

    NVIDIA

    Austin, TX
    1 day ago
  •  ...Role The MSIP UMC team is looking for an ASIC Design Verification Engineer to join our growing team. We develop...  ...will be involved in all aspects of IP verification starting from helping to...  ...random and directed) using SystemVerilog/UVM/SystemC. Triage and debug regressions.... 

    AMD

    Austin, TX
    6 hours ago
  • $136k - $218.5k

    NVIDIA is seeking an exceptional Senior SoC ASIC Verification Engineer to confirm the functionality of the world’s most powerful AI-enabled SoCs. These...  ...at least one of these: C++, Object‑Oriented Programming, UVM, System Verilog. Familiarity with verification challenges... 
    Worldwide

    NVIDIA

    Austin, TX
    1 day ago
  • $116k - $189.75k

    NVIDIA is looking for an ASIC Verification Engineer to help verify our global IP. This position offers an opportunity to impact an array of products while collaborating...  ...will verify Build verification components using SV/UVM methodology Drive coverage-based verification... 

    NVIDIA

    Austin, TX
    1 day ago
  • $150k - $165k

    Encore Semi, Inc. is looking for a Sr Design Verification Engineer (Remote) to verify complex digital systems such as ARM-based CPUs. The position...  ...of the verification lifecycle using SystemVerilog and UVM. The expected salary ranges from $150,000 to $165,000 annually... 
    Remote job

    Encore Semi, Inc.

    Austin, TX
    1 day ago
  •  ...technology firm in Austin, Texas, is seeking a skilled engineer to join Project Kuiper. In this role, you will implement a verification environment and participate in validation processes and system-level verification using UVM. The ideal candidate possesses a Bachelor's... 

    Amazon Kuiper Manufacturing Enterprises LLC

    Austin, TX
    1 day ago
  • $136k - $218.5k

     ...Requisition ID JR2006265 Job Category Engineering Time Type Full time Position Overview Senior ASIC Verification Engineer. Verify our global IP, impacting consumer graphics, self‑driving...  ...Build verification components using SV/UVM methodology Drive coverage‑based... 
    Full time

    NVIDIA AI

    Austin, TX
    1 day ago
  • $100k - $166.75k

     ...the world! NVIDIA is seeking an outstanding ASIC Verification Engineer to verify the design and implementation of the world’s leading SoC's and GPU's. This position offers the...  ...tools like Debussy, GDB), and methodologies (UVM or equivalent). Your work displays a passion... 

    NVIDIA

    Austin, TX
    1 day ago
  • $80k - $160k

    A technology consulting firm is seeking a Design Verification Engineer to join the team for a full-time project. The role involves understanding SV and UVM, building verification environments, and collaborating with various technical teams. Candidates should have solid... 
    Full time

    Avanciers Inc.

    Austin, TX
    1 day ago
  •  ...We lead in chip design, verification, and IP integration, empowering the...  ...and highly skilled ASIC Digital Verification Engineer with a passion for ensuring...  ...using SystemVerilog and UVM. Collaborating with design...  ...work alongside industry experts and contribute to the development... 

    Synopsys

    Austin, TX
    1 day ago
  • Job Title: Digital IP Principal Verification Engineer Primary Location: Austin (Oakhill, Office) Role Summary...  ...Writing stimulus in System Verilog (UVM), random test scenarios, algorithmic...  ...Minimum 6 years of experience in IP or SoC design or verification. Design skills... 
    Work at office
    Local area

    NXP Semiconductors

    Austin, TX
    1 day ago
  •  ...the MME MCU/MPU Digital IP team. We develop best-...  ...Summary Define and execute verification plans Develop and...  ...and leverage advanced UVM VIPs Develop directed...  ...and grow a small team of engineers Cross-Functional Collaboration...  ...with local and global SoC and IP teams to drive... 
    Local area

    NXP Semiconductors

    Austin, TX
    1 day ago
  • SpaceX is looking for a SR. SOC/ASIC PHYSICAL DESIGN ENGINEER to join our team in Austin, Texas. This role involves developing next-generation silicon for space and ground infrastructures and requires strong experience in ASIC design. Qualified candidates will hold a Bachelor... 

    SpaceX

    Austin, TX
    1 day ago
  • Responsibilities Lead verification planning and execution for complex...  ...subsystems. Develop sophisticated UVM environments, reference...  ...technical excellence. Mentor junior engineers in verification standard...  ...related field. 8+ years of ASIC/SoC verification experience.... 
    Permanent employment
    Temporary work
    Local area

    Blue Origin

    Austin, TX
    1 day ago
  • Principal ASIC Verification Engineer At Blue Origin, we envision millions of people living...  ...Satellite communication ASIC or SoC programs. Establish verification...  ...ASIC/SoC verification experience. Expert-level knowledge of System Verilog, UVM, assertions, and verification... 
    Permanent employment
    Temporary work
    Local area
    Worldwide

    Blue Origin

    Austin, TX
    1 day ago
  • Renesas is seeking a Principal Digital Verification Engineer in Austin, Texas. The role requires a strong background in verifying DDR5 Data Buffer and working on system-level integrations using UVM methodology. Responsibilities include leading verification efforts, developing... 

    Renesas

    Austin, TX
    1 day ago
  • A leading technology company is seeking an ASIC Design Verification Engineer - New College Grad 2026 to join their team in Austin, Texas. This entry-level...  ...Engineering and experience with System Verilog, UVM, and Python. NVIDIA offers competitive salaries and a comprehensive... 

    NVIDIA

    Austin, TX
    1 day ago
  • NVIDIA is hiring a Senior ASIC Verification Engineer in Austin, Texas, to verify innovative high-speed coherent interconnect designs for mobile SoCs and GPUs. The ideal candidate will have a Bachelor's or Master's degree with over 3 years of experience in verification,... 

    NVIDIA

    Austin, TX
    1 day ago
  •  ...SoC Design Verification, SystemVerilog, UVM, Object-Oriented Programming, Python, C++, Java, Digital Design, Computer Architecture, Networking Protocol...  ...most innovative and key projects thatApple’s Silicon Engineering Group has embarked upon to date. As part of ourteam,... 
    Flexible hours

    Y Axis Inc

    Austin, TX
    6 hours ago
  •  ...areas of VLSI design, from Spec-to-Silicon, on a wide range of ASICs & CPUs/GPUs in all the latest technologies, including 7nm....  ...operations in India & APAC. Job Description Job Title: SoC Verification Engineer Location: Austin, TX Duration: 06 months (High Possibility... 
    Flexible hours

    Insilico

    Austin, TX
    1 day ago

Do you want to receive more vacancies?

Subscribe and receive similar vacancies to ASIC Verification Engineer — IP/SoC, UVM Expert. Be the first to apply!