Design Verification Engineer, Principal
$161.3k - $260kd-Matrix
Location Hybrid. Works onsite at Santa Clara, CA headquarters 3 days per week. The role Design Verification Engineer, Principal What you will do Work on the company’s first highly programmable in‑memory computing architecture that applies across cloud to edge. Lead verification of SoC from architecture through tape‑out and bring up the design, ensuring robust ASIC‑SoC functionality. Minimum Requirements BS in Electrical Engineering, Computer Science, or related field with 15+ years of industry experience; or MS with 12+ years. Experience in SoC verification cycle from architecture to tape‑out to bring up. Good knowledge of verification methodologies such as UVM/OVM. Hands‑on ASIC‑SoC design verification test and debug experience. Fluency with SystemVerilog randomization constraints, coverage, and assertions methodology. Strong problem‑solving skills and passion for AI domain. Experience with SystemVerilog and verification methodology (UVM/OVM/VMM). Passion for AI and thriving in a fast‑paced startup culture. Preferred Requirements Experience with C/C++ and SystemC. Successfully led creation/implementation of multiple SoC verification environments and tape‑out efforts. Equal Opportunity Employment Policy d-Matrix is proud to be an equal opportunity workplace and affirmative action employer. We’re committed to fostering an inclusive environment where everyone feels welcomed and empowered to do their best work. We hire the best talent for our teams, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. Our focus is on hiring teammates with humble expertise, kindness, dedication and a willingness to embrace challenges and learn together every day. Compensation $161.3K – $260K • Offers Equity • Offers Bonus The pay range below is for all roles at this level across all US locations and functions. Individual pay rates depend on a number of factors—including the role’s function and location, as well as the individual’s knowledge, skills, experience, education, and training. We also offer incentive opportunities that reward employees based on individual and company performance. This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. In addition to the usual Medical/Dental/Vision/401k, our inclusive rewards plan empowers our people to care for their whole selves. An investment in your future is an investment in ours. #J-18808-Ljbffr d-Matrix
$185k - $230k
...Principal Design Verification Engineer California Astera Labs provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential...PrincipalFlexible hoursNight shift- ...bout the Role & Team: s part of the Design Verification Team , you will verify the circuitry that goes inside our chips for both... ...project management and leading a team of verification engineers at a project level. Key Responsibilities: Test Planning...Principal
- We are seeking an experienced Principal Design Verification Engineer to lead verification activities for complex SoC designs. The ideal candidate will architect and develop advanced verification environments, create comprehensive test plans, and collaborate with cross-...Principal
$158.6k - $317.8k
...Position Title: Design Verification Engineer, Principal (Confidential Client) Location: Santa Clara, CA | Onsite Employment Type: Permanent Compensation Salary: $158,600 - $317,800/yr Variable Compensation: Base, bonus, RSUs, Refresher RSUs Position Summary...PrincipalPermanent employment$138k - $317.8k
...Position Title: Principal, Design Verification Engineer, UAL and PCIe Subsystems (Confidential Client) Location: Santa Clara, CA | Onsite Employment Type: Permanent Compensation Salary: $138,000 - $317,800/yr Bonus: Base, bonus, RSU, refresher RSUs Position...PrincipalPermanent employment$158.6k - $317.8k
...to create scalable, secure, and user-friendly applications. As we continue to grow, we’re looking for a skilled Principal Design Verification Engineer to join our dynamic team and contribute to our mission of transforming business processes through technology. This...PrincipalFull timeLocal areaImmediate startVisa sponsorshipRelocation package- ...We are looking for a Senior Principal Physical Design Engineer to own the top-level floorplan, global power networks, and timing budgets for our next-generation architecture. Requirement Advanced Chip Ownership: Proven track record of owning full-chip top-level integration...Principal
- ...experience. Job Requirements Architect block and full-chip verification environments using HVLs and constrained random techniques for... ...in C, SV, UVM. Debug RTL and Gate simulations and work with design engineers to verify fixes. Write diagnostics for validation of FPGA prototype...
- ...wide recognition, have assembled a world‑class engineering team and just closed a record funding round. They're hiring a verification engineer to help build their verification... ...infrastructure and test cases in collaboration with the design team Debug failures, create and track issues...
$168k - $336k
...As a senior Design Verification engineer, you will employ GenAI and agentic tools to build a design verification environment with an innovative workflow that improves verification efficiency and quality. You will demonstrate clear value in enabling schedule left‑shift...Full timeLocal areaShift work- ...We are seeking a Principal Design Verification Engineer to lead the verification of complex SoCs and network switching solutions. This role involves developing advanced verification environments, driving verification methodologies, and collaborating closely with design...
- ...perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. The Role As a Senior CPU Design Verification Engineer, you will join a CPU testbench infrastructure team responsible for building scalable verification environments for next-...
- ...environments, including Goldman Sachs, IBM Cloud, Microsoft Azure and Oracle. THE PERSON: We are seeking a high‑impact Design Verification Engineer with strong technical depth, ownership and the ability to drive verification closure on complex, high‑performance ASIC designs...
- ...our services based on turnkey, Offshore design center (ODC) or staff augmentation. Services... ...ASIC BU: SoC/ASIC RTL Design, UVM based verification, Emulation, FPGA based validation, DFT,... ...causes, and collaborate with design engineers to resolve issues. Drive functional and...
$115k - $268k
...computing. Join us and be part of one of the most exciting semiconductor startups in the industry. We are hiring multiple Design Verification engineers to advance our innovative RISC-V processors and subsystems. Role: Develop and execute verification plans for units and...Contract work$142.6k - $206.5k
..., which includes participating in high-level product specifications, logic/RTL design and implementation, RTL verification, IP FPGA validation and debugging. Job Details As Lead DV Engineer focusing on IP Verification & Validation, you will be responsible for carrying...Local areaShift work$135k - $155k
...SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. Design Verification Engineer (Silicon Engineering) At SpaceX we’re leveraging our experience in building rockets and spacecraft to deploy Starlink,...Permanent employmentTemporary workWorldwide- ...Looking for Design Verification Engineer with following skills: UVM / UPF / VIP System Verilog / VHDL SOC verification Python or TCL Seniority level Associate Employment type Contract Job function Management, Design, and Information Technology Industries Staffing and...Contract work
- ...POSITION: Senior DV Engineer Who We Are: Quest Global delivers world-class end-to-end engineering... ..., but also perpetually driven to design, develop, and test as a trusted partner... ...leading and executing end-to-end design verification activities for IP, Subsystem, or SoC-level...Remote work
$130k - $160k
...Team Credo is seeking a Design Verification Engineer to ensure the quality and performance of complex digital designs through rigorous verification. You’ll develop and execute verification plans, build scalable reusable testbenches, write SV‑UVM sequences, debug issues...- ...Black Sesame Technologies is seeking motivated and detail-oriented individuals to join our team as Engineer, Design Verification . This is a great opportunity to be part of a fast-paced environment working on next-generation automotive SoCs. You will be involved in developing...Internship
- ...Overview We are seeking a highly motivated Design Verification Engineer to join our Interface IP DV team . In this role, you will collaborate closely with architects, designers, and external vendors to ensure that architecture requirements are fully implemented across...
$190k - $230k
...high‑speed inference. Key Responsibilities Work with architects, designers, post‑silicon and software engineers to ensure a high‑quality design that works for silicon. Develop and implement verification strategies, detailed tests and coverage plans based on micro‑architecture...- ...to collaborate, contribute, and revolutionize AI silicon and system. Job Description We are looking for an experienced design verification engineer to join our SoC team at Baidu’s Sunnyvale office. The successful candidate will be a motivated self-starter who will thrive...Work at office
$156.85k - $160k
...Nextgen Technologies Inc., has openings for Design Verification Engineer in San Jose, CA: Job Title: Design Verification Engineer Job Duration: 40 Hours / Week, Permanent position, Full time J ob Duties: Collaborate with design and development teams to understand product...Permanent employmentFull time- ...Opportunity: We are seeking a highly motivated and skilled FPGA Verification Engineer to join our dynamic team, working on state of the art... ...you will be responsible for the verification of complex FPGA designs, ensuring their functionality, performance, and reliability....Contract work
- ...Location: San Jose, CA Looking for engineers with strong protocol expertise to verify industry-standard interface IPs such as PCIe, DDR... ...ingAnalyze protocol-level failures and debug iss uesWork with design teams to ensure spec complia Required Ski lls: Strong knowledge...
$119.8k - $258k
...We are looking for a Design Verification Engineer to support SoC-level verification of advanced high-speed and security IP. This role involves close collaboration with design and architecture teams to verify complex digital systems. Responsibilities Develop and execute...Full time- ...bring passion and dedication to our job and when you are a part of that team there's no telling what you could accomplish. Design Verification Engineers at Apple are responsible for verifying the functionality and performance of Apple's premier SOCs. This is a critical job...
$80 - $90 per hour
...$90.00/hr Direct message the job poster from Infotree Global Solutions We are looking for an adaptive, self-motivative Design Verification Engineer to join our growing team. As a key contributor, you will be part of a leading team to drive and improve client's abilities...16 hoursContract work
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