Design Verification Engineer
$150.4k - $277.6kApple
Apple Inc. in Santa Clara, CA, seeks an experienced CPU Microarchitect/RTL Engineer to drive front-end and out-of-order subsystem architecture and RTL development for high‑performance cores.
You will own architecture specifications, RTL refinement, verification, and performance exploration in collaboration with multiple engineering teams. Base pay range is $150,400 to $277,600, with eligibility for stock programs, comprehensive benefits, education reimbursement and relocation support.
#J-18808-LjbffrVacancy posted 3 days ago
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