Senior CPU Verification Engineer — UVM & ISS Specialist
$70 - $85 per hourACL Digital
A technology company in California is seeking a Design Verification Engineer to develop and maintain verification environments for CPU subsystems. Responsibilities include verifying CPU cores, implementing constrained-random testing, and debugging functional issues. Candidates should have strong SystemVerilog and UVM skills and experience in processor verification. The pay range is between $70 to $85 per hour on W2 basis. #J-18808-Ljbffr ACL Digital
$168k - $264.5k
...NVIDIA, we are redefining the future of computing! As a Senior Verification Engineer on our CPU Verification Team, you will play a pivotal role in our mission... ...random verification environment using SystemVerilog and UVM. Proficient in one or more scripting languages like...SeniorWork experience placement$163k - $237k
...qualifications Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science... ...8 years of experience in both Design Verification (UVM/SystemVerilog) and Hardware Emulation.... ...architecture. Understanding of CPU/SoC micro-architecture. Knowledge of standard...SeniorWorldwide$156k - $229k
...Bachelor's degree in Electrical Engineering, Computer Engineering,... ...experience. 5 years of experience in verification methodologies and languages... ...Verification Methodology (UVM) and SystemVerilog. Preferred... ...verification for future CPU developments. Perform functional...SeniorFull timeWorldwide- iFlow Inc. is seeking a Design Verification Engineer based in Santa Clara, CA, for a long-term position. The successful candidate will possess 8... ...experience, showcasing a strong proficiency in SystemVerilog and UVM, alongside debugging skills. Key responsibilities include...Senior
- NVIDIA is seeking a Senior Performance Verification Engineer in Santa Clara, CA. This role involves defining and implementing performance verification strategies for CPU designs, analyzing workloads to identify performance bottlenecks, and leading junior engineers. The...Senior
$119.8k - $258k
...technology company located in Mountain View, CA is seeking a Design Verification Engineer to support SoC-level verification of advanced high-speed and... ...experience and strong skills in SystemVerilog and UVM. This position offers a full-time employment opportunity with...SeniorFull time- NVIDIA is seeking a Senior Verification Engineer for the CPU Verification Team in Santa Clara, California. You will define and execute verification strategies, applying state-of-the-art methodologies to improve efficiency. The ideal candidate has extensive experience in...Senior
- AMD is seeking a Senior CPU Design Verification Engineer to develop and enhance CPU-level testbench infrastructure for next-generation processors. This role involves working collaboratively with global teams to ensure high-quality verification through advanced methodologies...Senior
$150k - $165k
Encore Semi, Inc. in Sunnyvale, CA is seeking a Sr Design Verification Engineer to verify complex digital systems, including ARM-based CPUs and... ...the full verification lifecycle, utilizing SystemVerilog and UVM to ensure design quality and integrity. The anticipated annual...Senior- We are seeking a Design Verification Engineer to develop and maintain UVM-based verification environments for CPU subsystems. Responsibilities Verify CPU cores, pipelines, and instruction... ...Integrate Instruction Set Simulators (ISS) with DV environments Debug complex...
- Intuitive Surgical, Inc. is seeking an experienced FPGA Verification Engineer based in Sunnyvale, California. The role involves verifying FPGA's... ...plans. The successful candidate will have advanced knowledge of UVM methodology and expertise in SystemVerilog. This position is...Senior
$156k - $229k
A leading technology company in Mountain View is seeking a Verification Engineer to develop cutting-edge custom silicon solutions for their products. The role requires a Bachelor's degree and 5 years of experience in verification methodologies. Responsibilities include...Senior- ...beyond. Together, we advance your career. The Role As a Senior CPU Design Verification Engineer, you will join a CPU testbench infrastructure team responsible... ...tests and components using C++, SystemVerilog, and UVM Collaborate with design, verification, and debug teams...Senior
$136k - $218.5k
NVIDIA is seeking an exceptional Senior SoC ASIC Verification Engineer to confirm the functionality of the world... ...these: C++, Object‑Oriented Programming, UVM, System Verilog. Familiarity with... ...Solid understanding of basic concepts of CPU or SoC architecture. Experience with...Senior$136k - $218.5k
...Interconnect/Fabric experts with strong verification fundamentals to work in Nvidia’s CPU team. This position offers the... .... What You’ll Be Doing As a Senior Verification Engineer, you will verify the build,... ...using System Verilog and UVM. A passion for debugging and strong...SeniorNight shift$130k - $160k
...Team Credo is seeking a Design Verification Engineer to ensure the quality and performance of complex... ...scalable reusable testbenches, write SV‑UVM sequences, debug issues, and collaborate... ...subsystems and other interfaces (I2C/I3C/SMBus/CPU/UART/SPI) at block and subsystem levels...Senior$168k - $264.5k
...us today! We are now looking for a Senior System Verification Engineer to join our Emulation division and will... ..., SpeedBridges, Accelerated UVM Testbenches). Bring up GPUs, SOCs, Switch... ...UART. Bring‑up/debug issues related to CPU and GPU coherency. We have continual...SeniorWorldwideFlexible hours- Job Openings (Mid/Sr/Princ) Verification Design Engineer (UVM) About the job (Mid/Sr/Princ) Verification Design Engineer (UVM) In this role, you will be driving the verification effort and methodology while working closely with architects, designers, and ML software engineers...Senior
$163k - $237k
...Bachelor's degree in electrical engineering or computer science, or equivalent... ...experience. 8 years of experience with verification methodologies and languages (e.g., UVM and SystemVerilog). Experience... ...analysis. Experienced in ARM or CPU based subsystem verification....SeniorFull timeWorldwide- STI is seeking a highly motivated FPGA Verification Engineer in Santa Clara, CA. In this role, you will develop verification plans for complex FPGA designs, ensuring functionality and reliability. You will collaborate closely with design engineers, execute verification...Senior
- A leading recruitment firm is seeking a skilled Verification Design Engineer (Mid/Sr/Princ) in Sunnyvale, California. The role involves creating UVM testbench environments for a custom AI processor, ensuring proper functionality through developed infrastructure and collaboration...
- ...Requirements Architect block and full-chip verification environments using HVLs and constrained... ...and mixed signal interfaces. Requires UVM, System Verilog, SVA. Develop test plans... ...and Gate simulations and work with design engineers to verify fixes. Write diagnostics for...Senior
$126.8k - $190.9k
CPU Processor Performance Verification Engineer Santa Clara, California, United States Hardware Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication...Relocation- A leading engineering firm in Santa Clara is looking for a Design Verification Engineer to join their team. In this role, you will validate advanced System-on-Chip designs... ...have extensive experience with SystemVerilog, UVM, and a proactive approach to problem-solving....Senior
- A leading technology company in Santa Clara seeks a CPU Processor Performance Verification Engineer. You'll be responsible for silicon performance verification and collaboration with various teams. Ideal candidates will have experience in performance modeling and expertise...
$175k - $215k
Waymo is hiring for a verification engineer responsible for building high-performance verification environments for their autonomous vehicle platforms... ...specifications and requires significant expertise in UVM/SystemVerilog and Python. This position follows a hybrid work...- Google in Mountain View, CA, is seeking a dedicated engineer to join their team. This role involves verifying designs using... ...advanced degree in Electrical Engineering, with experience in verification languages like UVM and SystemVerilog, as well as low-power design...
- Intel is hiring a Mixed Signal Design Verification Engineer in Santa Clara, California. You will develop verification plans for mixed signal logic... ...experience in verification methodologies, including OVM and UVM. Join us to drive innovation and create the technologies of...Senior
$168k - $264.5k
NVIDIA is seeking a Senior Verification Engineer for their Emulation division in Santa Clara, CA. The ideal candidate will support diverse emulation... ...proficiency in Verilog, VHDL, C/C++, and experience with UVM verification environments. The competitive base salary ranges...Senior- AMD is looking for a Senior Pre-Silicon Verification Engineer in Santa Clara, CA to join the Infinity Fabric transport layer verification team. The role... ...have a background in ASIC verification and experience with UVM, System Verilog, and various simulation tools,...Senior
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